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<a href="#nested-classes">Data Structures</a> &#124;
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Data Structures</h2></td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_bram___config.html">XBram_Config</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">This typedef contains configuration information for the device.  <a href="struct_x_bram___config.html#details">More...</a><br /></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_bram.html">XBram</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">The <a class="el" href="struct_x_bram.html" title="The XBram driver instance data. ">XBram</a> driver instance data.  <a href="struct_x_bram.html#details">More...</a><br /></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
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Macros</h2></td></tr>
<tr class="memitem:ga65c3e2f96ab713a71079e4597c3d4b3b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#ga65c3e2f96ab713a71079e4597c3d4b3b">XBram_WriteReg</a>(BaseAddress,  RegOffset,  Data)&#160;&#160;&#160;XBram_Out32((BaseAddress) + (RegOffset), (u32)(Data))</td></tr>
<tr class="memdesc:ga65c3e2f96ab713a71079e4597c3d4b3b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Write a value to a BRAM register.  <a href="#ga65c3e2f96ab713a71079e4597c3d4b3b">More...</a><br /></td></tr>
<tr class="separator:ga65c3e2f96ab713a71079e4597c3d4b3b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa1021011d8c25fa885737c6ca9695742"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#gaa1021011d8c25fa885737c6ca9695742">XBram_ReadReg</a>(BaseAddress,  RegOffset)&#160;&#160;&#160;XBram_In32((BaseAddress) + (RegOffset))</td></tr>
<tr class="memdesc:gaa1021011d8c25fa885737c6ca9695742"><td class="mdescLeft">&#160;</td><td class="mdescRight">Read a value from a BRAM register.  <a href="#gaa1021011d8c25fa885737c6ca9695742">More...</a><br /></td></tr>
<tr class="separator:gaa1021011d8c25fa885737c6ca9695742"><td class="memSeparator" colspan="2">&#160;</td></tr>
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Functions</h2></td></tr>
<tr class="memitem:gab305438b0844ddb20139878c21ef0e6b"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#gab305438b0844ddb20139878c21ef0e6b">XBram_CfgInitialize</a> (<a class="el" href="struct_x_bram.html">XBram</a> *InstancePtr, <a class="el" href="struct_x_bram___config.html">XBram_Config</a> *Config, UINTPTR EffectiveAddr)</td></tr>
<tr class="memdesc:gab305438b0844ddb20139878c21ef0e6b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialize the <a class="el" href="struct_x_bram.html" title="The XBram driver instance data. ">XBram</a> instance provided by the caller based on the given configuration data.  <a href="#gab305438b0844ddb20139878c21ef0e6b">More...</a><br /></td></tr>
<tr class="separator:gab305438b0844ddb20139878c21ef0e6b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab4bacc0667e96732958979264a8a1296"><td class="memItemLeft" align="right" valign="top"><a class="el" href="struct_x_bram___config.html">XBram_Config</a> *&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#gab4bacc0667e96732958979264a8a1296">XBram_LookupConfig</a> (u16 DeviceId)</td></tr>
<tr class="memdesc:gab4bacc0667e96732958979264a8a1296"><td class="mdescLeft">&#160;</td><td class="mdescRight">Lookup the device configuration based on the unique device ID.  <a href="#gab4bacc0667e96732958979264a8a1296">More...</a><br /></td></tr>
<tr class="separator:gab4bacc0667e96732958979264a8a1296"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaedbdefb6cda5c212f03271143ccf7a98"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#gaedbdefb6cda5c212f03271143ccf7a98">XBram_SelfTest</a> (<a class="el" href="struct_x_bram.html">XBram</a> *InstancePtr, u8 IntMask)</td></tr>
<tr class="memdesc:gaedbdefb6cda5c212f03271143ccf7a98"><td class="mdescLeft">&#160;</td><td class="mdescRight">Run a self-test on the driver/device.  <a href="#gaedbdefb6cda5c212f03271143ccf7a98">More...</a><br /></td></tr>
<tr class="separator:gaedbdefb6cda5c212f03271143ccf7a98"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4210a263bd85db259a74c20cd0b0176c"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#ga4210a263bd85db259a74c20cd0b0176c">XBram_InterruptEnable</a> (<a class="el" href="struct_x_bram.html">XBram</a> *InstancePtr, u32 Mask)</td></tr>
<tr class="memdesc:ga4210a263bd85db259a74c20cd0b0176c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable interrupts.  <a href="#ga4210a263bd85db259a74c20cd0b0176c">More...</a><br /></td></tr>
<tr class="separator:ga4210a263bd85db259a74c20cd0b0176c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9ce680e885511fdd26b6818b71b145c4"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#ga9ce680e885511fdd26b6818b71b145c4">XBram_InterruptDisable</a> (<a class="el" href="struct_x_bram.html">XBram</a> *InstancePtr, u32 Mask)</td></tr>
<tr class="memdesc:ga9ce680e885511fdd26b6818b71b145c4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Disable interrupts.  <a href="#ga9ce680e885511fdd26b6818b71b145c4">More...</a><br /></td></tr>
<tr class="separator:ga9ce680e885511fdd26b6818b71b145c4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa4ac1ca5c9c05eabbdea77f35ba9ac5a"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#gaa4ac1ca5c9c05eabbdea77f35ba9ac5a">XBram_InterruptClear</a> (<a class="el" href="struct_x_bram.html">XBram</a> *InstancePtr, u32 Mask)</td></tr>
<tr class="memdesc:gaa4ac1ca5c9c05eabbdea77f35ba9ac5a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Clear pending interrupts with the provided mask.  <a href="#gaa4ac1ca5c9c05eabbdea77f35ba9ac5a">More...</a><br /></td></tr>
<tr class="separator:gaa4ac1ca5c9c05eabbdea77f35ba9ac5a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gafec7418ceae662672c03a938290da9dd"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#gafec7418ceae662672c03a938290da9dd">XBram_InterruptGetEnabled</a> (<a class="el" href="struct_x_bram.html">XBram</a> *InstancePtr)</td></tr>
<tr class="memdesc:gafec7418ceae662672c03a938290da9dd"><td class="mdescLeft">&#160;</td><td class="mdescRight">Returns the interrupt enable mask.  <a href="#gafec7418ceae662672c03a938290da9dd">More...</a><br /></td></tr>
<tr class="separator:gafec7418ceae662672c03a938290da9dd"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga3880bb684ad362c6bd289f3e76a98b59"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#ga3880bb684ad362c6bd289f3e76a98b59">XBram_InterruptGetStatus</a> (<a class="el" href="struct_x_bram.html">XBram</a> *InstancePtr)</td></tr>
<tr class="memdesc:ga3880bb684ad362c6bd289f3e76a98b59"><td class="mdescLeft">&#160;</td><td class="mdescRight">Returns the status of interrupt signals.  <a href="#ga3880bb684ad362c6bd289f3e76a98b59">More...</a><br /></td></tr>
<tr class="separator:ga3880bb684ad362c6bd289f3e76a98b59"><td class="memSeparator" colspan="2">&#160;</td></tr>
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Variables</h2></td></tr>
<tr class="memitem:gab776609479170485eb94104fe6a94a12"><td class="memItemLeft" align="right" valign="top"><a class="el" href="struct_x_bram___config.html">XBram_Config</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#gab776609479170485eb94104fe6a94a12">XBram_ConfigTable</a> []</td></tr>
<tr class="memdesc:gab776609479170485eb94104fe6a94a12"><td class="mdescLeft">&#160;</td><td class="mdescRight">This table contains configuration information for each BRAM device in the system.  <a href="#gab776609479170485eb94104fe6a94a12">More...</a><br /></td></tr>
<tr class="separator:gab776609479170485eb94104fe6a94a12"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab776609479170485eb94104fe6a94a12"><td class="memItemLeft" align="right" valign="top"><a class="el" href="struct_x_bram___config.html">XBram_Config</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#gab776609479170485eb94104fe6a94a12">XBram_ConfigTable</a> []</td></tr>
<tr class="memdesc:gab776609479170485eb94104fe6a94a12"><td class="mdescLeft">&#160;</td><td class="mdescRight">This table contains configuration information for each BRAM device in the system.  <a href="#gab776609479170485eb94104fe6a94a12">More...</a><br /></td></tr>
<tr class="separator:gab776609479170485eb94104fe6a94a12"><td class="memSeparator" colspan="2">&#160;</td></tr>
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="member-group"></a>
Registers</h2></td></tr>
<tr><td class="ititle" colspan="2"><p><a class="anchor" id="amgrpa9682ea50df45368189078864618a7cd"></a>Register offsets for this device. </p>
</td></tr>
<tr class="memitem:gab88ad395282af43eaf6890c73e1a767d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#gab88ad395282af43eaf6890c73e1a767d">XBRAM_ECC_STATUS_OFFSET</a>&#160;&#160;&#160;0x0</td></tr>
<tr class="memdesc:gab88ad395282af43eaf6890c73e1a767d"><td class="mdescLeft">&#160;</td><td class="mdescRight">ECC status Register.  <a href="#gab88ad395282af43eaf6890c73e1a767d">More...</a><br /></td></tr>
<tr class="separator:gab88ad395282af43eaf6890c73e1a767d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga1bd9b2cad381c89b81b18e4784b357d3"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#ga1bd9b2cad381c89b81b18e4784b357d3">XBRAM_ECC_EN_IRQ_OFFSET</a>&#160;&#160;&#160;0x4</td></tr>
<tr class="memdesc:ga1bd9b2cad381c89b81b18e4784b357d3"><td class="mdescLeft">&#160;</td><td class="mdescRight">ECC interrupt enable Register.  <a href="#ga1bd9b2cad381c89b81b18e4784b357d3">More...</a><br /></td></tr>
<tr class="separator:ga1bd9b2cad381c89b81b18e4784b357d3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5a60015301177917f16c852b91a804a8"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#ga5a60015301177917f16c852b91a804a8">XBRAM_ECC_ON_OFF_OFFSET</a>&#160;&#160;&#160;0x8</td></tr>
<tr class="memdesc:ga5a60015301177917f16c852b91a804a8"><td class="mdescLeft">&#160;</td><td class="mdescRight">ECC on/off register.  <a href="#ga5a60015301177917f16c852b91a804a8">More...</a><br /></td></tr>
<tr class="separator:ga5a60015301177917f16c852b91a804a8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5984531e736eafd1a13193da61cba776"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#ga5984531e736eafd1a13193da61cba776">XBRAM_CE_CNT_OFFSET</a>&#160;&#160;&#160;0xC</td></tr>
<tr class="memdesc:ga5984531e736eafd1a13193da61cba776"><td class="mdescLeft">&#160;</td><td class="mdescRight">Correctable error counter Register.  <a href="#ga5984531e736eafd1a13193da61cba776">More...</a><br /></td></tr>
<tr class="separator:ga5984531e736eafd1a13193da61cba776"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad84de0d6fe7b326b75f3a204f09bcb6c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#gad84de0d6fe7b326b75f3a204f09bcb6c">XBRAM_CE_FFD_0_OFFSET</a>&#160;&#160;&#160;0x100</td></tr>
<tr class="memdesc:gad84de0d6fe7b326b75f3a204f09bcb6c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Correctable error first failing data Register, 31-0.  <a href="#gad84de0d6fe7b326b75f3a204f09bcb6c">More...</a><br /></td></tr>
<tr class="separator:gad84de0d6fe7b326b75f3a204f09bcb6c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga53c453716e72763bd19786d217fc3bbc"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#ga53c453716e72763bd19786d217fc3bbc">XBRAM_CE_FFD_1_OFFSET</a>&#160;&#160;&#160;0x104</td></tr>
<tr class="memdesc:ga53c453716e72763bd19786d217fc3bbc"><td class="mdescLeft">&#160;</td><td class="mdescRight">Correctable error first failing data Register, 63-32.  <a href="#ga53c453716e72763bd19786d217fc3bbc">More...</a><br /></td></tr>
<tr class="separator:ga53c453716e72763bd19786d217fc3bbc"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga2a535c1b67c8a9a5269177d101e2c756"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#ga2a535c1b67c8a9a5269177d101e2c756">XBRAM_CE_FFD_2_OFFSET</a>&#160;&#160;&#160;0x108</td></tr>
<tr class="memdesc:ga2a535c1b67c8a9a5269177d101e2c756"><td class="mdescLeft">&#160;</td><td class="mdescRight">Correctable error first failing data Register, 95-64.  <a href="#ga2a535c1b67c8a9a5269177d101e2c756">More...</a><br /></td></tr>
<tr class="separator:ga2a535c1b67c8a9a5269177d101e2c756"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaaca415ca0a5618f930cf32fd013297fc"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#gaaca415ca0a5618f930cf32fd013297fc">XBRAM_CE_FFD_3_OFFSET</a>&#160;&#160;&#160;0x10C</td></tr>
<tr class="memdesc:gaaca415ca0a5618f930cf32fd013297fc"><td class="mdescLeft">&#160;</td><td class="mdescRight">Correctable error first failing data Register, 127-96.  <a href="#gaaca415ca0a5618f930cf32fd013297fc">More...</a><br /></td></tr>
<tr class="separator:gaaca415ca0a5618f930cf32fd013297fc"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga2869a0061c7ff0ade8b507135f404b02"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#ga2869a0061c7ff0ade8b507135f404b02">XBRAM_CE_FFD_4_OFFSET</a>&#160;&#160;&#160;0x110</td></tr>
<tr class="memdesc:ga2869a0061c7ff0ade8b507135f404b02"><td class="mdescLeft">&#160;</td><td class="mdescRight">Correctable error first failing data Register, 159-128.  <a href="#ga2869a0061c7ff0ade8b507135f404b02">More...</a><br /></td></tr>
<tr class="separator:ga2869a0061c7ff0ade8b507135f404b02"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga70ced7f84d7536867d282a9661229d58"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#ga70ced7f84d7536867d282a9661229d58">XBRAM_CE_FFD_5_OFFSET</a>&#160;&#160;&#160;0x114</td></tr>
<tr class="memdesc:ga70ced7f84d7536867d282a9661229d58"><td class="mdescLeft">&#160;</td><td class="mdescRight">Correctable error first failing data Register, 191-160.  <a href="#ga70ced7f84d7536867d282a9661229d58">More...</a><br /></td></tr>
<tr class="separator:ga70ced7f84d7536867d282a9661229d58"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8d2bc01b2692925c5843a33e1e78ab3c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#ga8d2bc01b2692925c5843a33e1e78ab3c">XBRAM_CE_FFD_6_OFFSET</a>&#160;&#160;&#160;0x118</td></tr>
<tr class="memdesc:ga8d2bc01b2692925c5843a33e1e78ab3c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Correctable error first failing data Register, 223-192.  <a href="#ga8d2bc01b2692925c5843a33e1e78ab3c">More...</a><br /></td></tr>
<tr class="separator:ga8d2bc01b2692925c5843a33e1e78ab3c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8af82dcc00374f78cb3bc37f10647cae"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#ga8af82dcc00374f78cb3bc37f10647cae">XBRAM_CE_FFD_7_OFFSET</a>&#160;&#160;&#160;0x11C</td></tr>
<tr class="memdesc:ga8af82dcc00374f78cb3bc37f10647cae"><td class="mdescLeft">&#160;</td><td class="mdescRight">Correctable error first failing data Register, 255-224.  <a href="#ga8af82dcc00374f78cb3bc37f10647cae">More...</a><br /></td></tr>
<tr class="separator:ga8af82dcc00374f78cb3bc37f10647cae"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga20bd5998265b96d7c360adc99254b4bb"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#ga20bd5998265b96d7c360adc99254b4bb">XBRAM_CE_FFD_8_OFFSET</a>&#160;&#160;&#160;0x120</td></tr>
<tr class="memdesc:ga20bd5998265b96d7c360adc99254b4bb"><td class="mdescLeft">&#160;</td><td class="mdescRight">Correctable error first failing data Register, 287-256.  <a href="#ga20bd5998265b96d7c360adc99254b4bb">More...</a><br /></td></tr>
<tr class="separator:ga20bd5998265b96d7c360adc99254b4bb"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf989dfcfdb9eab43c4b129f9eba174a5"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#gaf989dfcfdb9eab43c4b129f9eba174a5">XBRAM_CE_FFD_9_OFFSET</a>&#160;&#160;&#160;0x124</td></tr>
<tr class="memdesc:gaf989dfcfdb9eab43c4b129f9eba174a5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Correctable error first failing data Register, 319-288.  <a href="#gaf989dfcfdb9eab43c4b129f9eba174a5">More...</a><br /></td></tr>
<tr class="separator:gaf989dfcfdb9eab43c4b129f9eba174a5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga00296613e6a8e8bd4c9909667fb3e676"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#ga00296613e6a8e8bd4c9909667fb3e676">XBRAM_CE_FFD_10_OFFSET</a>&#160;&#160;&#160;0x128</td></tr>
<tr class="memdesc:ga00296613e6a8e8bd4c9909667fb3e676"><td class="mdescLeft">&#160;</td><td class="mdescRight">Correctable error first failing data Register, 351-320.  <a href="#ga00296613e6a8e8bd4c9909667fb3e676">More...</a><br /></td></tr>
<tr class="separator:ga00296613e6a8e8bd4c9909667fb3e676"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga3c2b4f9ea2b4a54b0c344e28e1f6b5e6"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#ga3c2b4f9ea2b4a54b0c344e28e1f6b5e6">XBRAM_CE_FFD_11_OFFSET</a>&#160;&#160;&#160;0x12C</td></tr>
<tr class="memdesc:ga3c2b4f9ea2b4a54b0c344e28e1f6b5e6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Correctable error first failing data Register, 383-352.  <a href="#ga3c2b4f9ea2b4a54b0c344e28e1f6b5e6">More...</a><br /></td></tr>
<tr class="separator:ga3c2b4f9ea2b4a54b0c344e28e1f6b5e6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga37f64a964cff8950a5a2e6218eb1862b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#ga37f64a964cff8950a5a2e6218eb1862b">XBRAM_CE_FFD_12_OFFSET</a>&#160;&#160;&#160;0x130</td></tr>
<tr class="memdesc:ga37f64a964cff8950a5a2e6218eb1862b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Correctable error first failing data Register, 415-384.  <a href="#ga37f64a964cff8950a5a2e6218eb1862b">More...</a><br /></td></tr>
<tr class="separator:ga37f64a964cff8950a5a2e6218eb1862b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga660100eb180ce92f5867c54e4b5aadc3"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#ga660100eb180ce92f5867c54e4b5aadc3">XBRAM_CE_FFD_13_OFFSET</a>&#160;&#160;&#160;0x134</td></tr>
<tr class="memdesc:ga660100eb180ce92f5867c54e4b5aadc3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Correctable error first failing data Register, 447-416.  <a href="#ga660100eb180ce92f5867c54e4b5aadc3">More...</a><br /></td></tr>
<tr class="separator:ga660100eb180ce92f5867c54e4b5aadc3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7b7b39f7a8bce2acd90325d9a64348a5"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#ga7b7b39f7a8bce2acd90325d9a64348a5">XBRAM_CE_FFD_14_OFFSET</a>&#160;&#160;&#160;0x138</td></tr>
<tr class="memdesc:ga7b7b39f7a8bce2acd90325d9a64348a5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Correctable error first failing data Register, 479-448.  <a href="#ga7b7b39f7a8bce2acd90325d9a64348a5">More...</a><br /></td></tr>
<tr class="separator:ga7b7b39f7a8bce2acd90325d9a64348a5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga39196d0c535fd2154c7396fcb071da7b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#ga39196d0c535fd2154c7396fcb071da7b">XBRAM_CE_FFD_15_OFFSET</a>&#160;&#160;&#160;0x13C</td></tr>
<tr class="memdesc:ga39196d0c535fd2154c7396fcb071da7b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Correctable error first failing data Register, 511-480.  <a href="#ga39196d0c535fd2154c7396fcb071da7b">More...</a><br /></td></tr>
<tr class="separator:ga39196d0c535fd2154c7396fcb071da7b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9b40093406a921feff2f6419c4e9c592"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#ga9b40093406a921feff2f6419c4e9c592">XBRAM_CE_FFD_16_OFFSET</a>&#160;&#160;&#160;0x140</td></tr>
<tr class="memdesc:ga9b40093406a921feff2f6419c4e9c592"><td class="mdescLeft">&#160;</td><td class="mdescRight">Correctable error first failing data Register, 543-512.  <a href="#ga9b40093406a921feff2f6419c4e9c592">More...</a><br /></td></tr>
<tr class="separator:ga9b40093406a921feff2f6419c4e9c592"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5b1f1bb5835a7331a9ed62d1cb011c6b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#ga5b1f1bb5835a7331a9ed62d1cb011c6b">XBRAM_CE_FFD_17_OFFSET</a>&#160;&#160;&#160;0x144</td></tr>
<tr class="memdesc:ga5b1f1bb5835a7331a9ed62d1cb011c6b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Correctable error first failing data Register, 575-544.  <a href="#ga5b1f1bb5835a7331a9ed62d1cb011c6b">More...</a><br /></td></tr>
<tr class="separator:ga5b1f1bb5835a7331a9ed62d1cb011c6b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad307a7a392ee15347020e84dc06145f2"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#gad307a7a392ee15347020e84dc06145f2">XBRAM_CE_FFD_18_OFFSET</a>&#160;&#160;&#160;0x148</td></tr>
<tr class="memdesc:gad307a7a392ee15347020e84dc06145f2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Correctable error first failing data Register, 607-576.  <a href="#gad307a7a392ee15347020e84dc06145f2">More...</a><br /></td></tr>
<tr class="separator:gad307a7a392ee15347020e84dc06145f2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa066298a3df7ae0cd1cded665037553b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#gaa066298a3df7ae0cd1cded665037553b">XBRAM_CE_FFD_19_OFFSET</a>&#160;&#160;&#160;0x14C</td></tr>
<tr class="memdesc:gaa066298a3df7ae0cd1cded665037553b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Correctable error first failing data Register, 639-608.  <a href="#gaa066298a3df7ae0cd1cded665037553b">More...</a><br /></td></tr>
<tr class="separator:gaa066298a3df7ae0cd1cded665037553b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga80b471a580edfdda8a91842ff6d1832b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#ga80b471a580edfdda8a91842ff6d1832b">XBRAM_CE_FFD_20_OFFSET</a>&#160;&#160;&#160;0x150</td></tr>
<tr class="memdesc:ga80b471a580edfdda8a91842ff6d1832b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Correctable error first failing data Register, 671-640.  <a href="#ga80b471a580edfdda8a91842ff6d1832b">More...</a><br /></td></tr>
<tr class="separator:ga80b471a580edfdda8a91842ff6d1832b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4d2212a596f185087b0a6fcc259aad8d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#ga4d2212a596f185087b0a6fcc259aad8d">XBRAM_CE_FFD_21_OFFSET</a>&#160;&#160;&#160;0x154</td></tr>
<tr class="memdesc:ga4d2212a596f185087b0a6fcc259aad8d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Correctable error first failing data Register, 703-672.  <a href="#ga4d2212a596f185087b0a6fcc259aad8d">More...</a><br /></td></tr>
<tr class="separator:ga4d2212a596f185087b0a6fcc259aad8d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga22b9375c4c6979bf4b9ff0f46da20144"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#ga22b9375c4c6979bf4b9ff0f46da20144">XBRAM_CE_FFD_22_OFFSET</a>&#160;&#160;&#160;0x158</td></tr>
<tr class="memdesc:ga22b9375c4c6979bf4b9ff0f46da20144"><td class="mdescLeft">&#160;</td><td class="mdescRight">Correctable error first failing data Register, 735-704.  <a href="#ga22b9375c4c6979bf4b9ff0f46da20144">More...</a><br /></td></tr>
<tr class="separator:ga22b9375c4c6979bf4b9ff0f46da20144"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga362cc644b2d14ce18e880ac7357409c5"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#ga362cc644b2d14ce18e880ac7357409c5">XBRAM_CE_FFD_23_OFFSET</a>&#160;&#160;&#160;0x15C</td></tr>
<tr class="memdesc:ga362cc644b2d14ce18e880ac7357409c5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Correctable error first failing data Register, 767-736.  <a href="#ga362cc644b2d14ce18e880ac7357409c5">More...</a><br /></td></tr>
<tr class="separator:ga362cc644b2d14ce18e880ac7357409c5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaeddcfb5854b88e4335db26dba0a6acd6"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#gaeddcfb5854b88e4335db26dba0a6acd6">XBRAM_CE_FFD_24_OFFSET</a>&#160;&#160;&#160;0x160</td></tr>
<tr class="memdesc:gaeddcfb5854b88e4335db26dba0a6acd6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Correctable error first failing data Register, 799-768.  <a href="#gaeddcfb5854b88e4335db26dba0a6acd6">More...</a><br /></td></tr>
<tr class="separator:gaeddcfb5854b88e4335db26dba0a6acd6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga432d170d7c49d50b98d6cdeab18357c1"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#ga432d170d7c49d50b98d6cdeab18357c1">XBRAM_CE_FFD_25_OFFSET</a>&#160;&#160;&#160;0x164</td></tr>
<tr class="memdesc:ga432d170d7c49d50b98d6cdeab18357c1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Correctable error first failing data Register, 831-800.  <a href="#ga432d170d7c49d50b98d6cdeab18357c1">More...</a><br /></td></tr>
<tr class="separator:ga432d170d7c49d50b98d6cdeab18357c1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9a6769c89417b38c032900b5d27db888"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#ga9a6769c89417b38c032900b5d27db888">XBRAM_CE_FFD_26_OFFSET</a>&#160;&#160;&#160;0x168</td></tr>
<tr class="memdesc:ga9a6769c89417b38c032900b5d27db888"><td class="mdescLeft">&#160;</td><td class="mdescRight">Correctable error first failing data Register, 863-832.  <a href="#ga9a6769c89417b38c032900b5d27db888">More...</a><br /></td></tr>
<tr class="separator:ga9a6769c89417b38c032900b5d27db888"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa5f596746613deedf350c2a05fa83c41"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#gaa5f596746613deedf350c2a05fa83c41">XBRAM_CE_FFD_27_OFFSET</a>&#160;&#160;&#160;0x16C</td></tr>
<tr class="memdesc:gaa5f596746613deedf350c2a05fa83c41"><td class="mdescLeft">&#160;</td><td class="mdescRight">Correctable error first failing data Register, 895-864.  <a href="#gaa5f596746613deedf350c2a05fa83c41">More...</a><br /></td></tr>
<tr class="separator:gaa5f596746613deedf350c2a05fa83c41"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa77a0f1427e291c95321811a2f0df97b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#gaa77a0f1427e291c95321811a2f0df97b">XBRAM_CE_FFD_28_OFFSET</a>&#160;&#160;&#160;0x170</td></tr>
<tr class="memdesc:gaa77a0f1427e291c95321811a2f0df97b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Correctable error first failing data Register, 927-896.  <a href="#gaa77a0f1427e291c95321811a2f0df97b">More...</a><br /></td></tr>
<tr class="separator:gaa77a0f1427e291c95321811a2f0df97b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab32289b47942c90cb79feb34cec01b91"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#gab32289b47942c90cb79feb34cec01b91">XBRAM_CE_FFD_29_OFFSET</a>&#160;&#160;&#160;0x174</td></tr>
<tr class="memdesc:gab32289b47942c90cb79feb34cec01b91"><td class="mdescLeft">&#160;</td><td class="mdescRight">Correctable error first failing data Register, 959-928.  <a href="#gab32289b47942c90cb79feb34cec01b91">More...</a><br /></td></tr>
<tr class="separator:gab32289b47942c90cb79feb34cec01b91"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga0ddc18fca994ef2701ff7c5a85946f1a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#ga0ddc18fca994ef2701ff7c5a85946f1a">XBRAM_CE_FFD_30_OFFSET</a>&#160;&#160;&#160;0x178</td></tr>
<tr class="memdesc:ga0ddc18fca994ef2701ff7c5a85946f1a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Correctable error first failing data Register, 991-960.  <a href="#ga0ddc18fca994ef2701ff7c5a85946f1a">More...</a><br /></td></tr>
<tr class="separator:ga0ddc18fca994ef2701ff7c5a85946f1a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaac5b99e4d9e561ad68f834abc34e8374"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#gaac5b99e4d9e561ad68f834abc34e8374">XBRAM_CE_FFD_31_OFFSET</a>&#160;&#160;&#160;0x17C</td></tr>
<tr class="memdesc:gaac5b99e4d9e561ad68f834abc34e8374"><td class="mdescLeft">&#160;</td><td class="mdescRight">Correctable error first failing data Register, 1023-992.  <a href="#gaac5b99e4d9e561ad68f834abc34e8374">More...</a><br /></td></tr>
<tr class="separator:gaac5b99e4d9e561ad68f834abc34e8374"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga80f2eea8b2d7528428940b32a65f4d62"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#ga80f2eea8b2d7528428940b32a65f4d62">XBRAM_CE_FFE_0_OFFSET</a>&#160;&#160;&#160;0x180</td></tr>
<tr class="memdesc:ga80f2eea8b2d7528428940b32a65f4d62"><td class="mdescLeft">&#160;</td><td class="mdescRight">Correctable error first failing ECC Register, 31-0.  <a href="#ga80f2eea8b2d7528428940b32a65f4d62">More...</a><br /></td></tr>
<tr class="separator:ga80f2eea8b2d7528428940b32a65f4d62"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaff1d136a2dc08caa938225b04fef25d1"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#gaff1d136a2dc08caa938225b04fef25d1">XBRAM_CE_FFE_1_OFFSET</a>&#160;&#160;&#160;0x184</td></tr>
<tr class="memdesc:gaff1d136a2dc08caa938225b04fef25d1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Correctable error first failing ECC Register, 63-32.  <a href="#gaff1d136a2dc08caa938225b04fef25d1">More...</a><br /></td></tr>
<tr class="separator:gaff1d136a2dc08caa938225b04fef25d1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaeb0dd722ff7c9322979747aaf8ffa86b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#gaeb0dd722ff7c9322979747aaf8ffa86b">XBRAM_CE_FFE_2_OFFSET</a>&#160;&#160;&#160;0x188</td></tr>
<tr class="memdesc:gaeb0dd722ff7c9322979747aaf8ffa86b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Correctable error first failing ECC Register, 95-64.  <a href="#gaeb0dd722ff7c9322979747aaf8ffa86b">More...</a><br /></td></tr>
<tr class="separator:gaeb0dd722ff7c9322979747aaf8ffa86b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gadabeed9529bc2962622ed92eaef3fa47"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#gadabeed9529bc2962622ed92eaef3fa47">XBRAM_CE_FFE_3_OFFSET</a>&#160;&#160;&#160;0x18C</td></tr>
<tr class="memdesc:gadabeed9529bc2962622ed92eaef3fa47"><td class="mdescLeft">&#160;</td><td class="mdescRight">Correctable error first failing ECC Register, 127-96.  <a href="#gadabeed9529bc2962622ed92eaef3fa47">More...</a><br /></td></tr>
<tr class="separator:gadabeed9529bc2962622ed92eaef3fa47"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac53b5b051994ba0dc8a93047e326d0f4"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#gac53b5b051994ba0dc8a93047e326d0f4">XBRAM_CE_FFE_4_OFFSET</a>&#160;&#160;&#160;0x190</td></tr>
<tr class="memdesc:gac53b5b051994ba0dc8a93047e326d0f4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Correctable error first failing ECC Register, 159-128.  <a href="#gac53b5b051994ba0dc8a93047e326d0f4">More...</a><br /></td></tr>
<tr class="separator:gac53b5b051994ba0dc8a93047e326d0f4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaed34dd3c61cfd7ee159eacccee9d2b9b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#gaed34dd3c61cfd7ee159eacccee9d2b9b">XBRAM_CE_FFE_5_OFFSET</a>&#160;&#160;&#160;0x194</td></tr>
<tr class="memdesc:gaed34dd3c61cfd7ee159eacccee9d2b9b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Correctable error first failing ECC Register, 191-160.  <a href="#gaed34dd3c61cfd7ee159eacccee9d2b9b">More...</a><br /></td></tr>
<tr class="separator:gaed34dd3c61cfd7ee159eacccee9d2b9b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf10601214d7b5cb9dd1ada50456c53ae"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#gaf10601214d7b5cb9dd1ada50456c53ae">XBRAM_CE_FFE_6_OFFSET</a>&#160;&#160;&#160;0x198</td></tr>
<tr class="memdesc:gaf10601214d7b5cb9dd1ada50456c53ae"><td class="mdescLeft">&#160;</td><td class="mdescRight">Correctable error first failing ECC Register, 223-192.  <a href="#gaf10601214d7b5cb9dd1ada50456c53ae">More...</a><br /></td></tr>
<tr class="separator:gaf10601214d7b5cb9dd1ada50456c53ae"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga75dffd37d7d0c364d58f4c887953b83f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#ga75dffd37d7d0c364d58f4c887953b83f">XBRAM_CE_FFE_7_OFFSET</a>&#160;&#160;&#160;0x19C</td></tr>
<tr class="memdesc:ga75dffd37d7d0c364d58f4c887953b83f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Correctable error first failing ECC Register, 255-224.  <a href="#ga75dffd37d7d0c364d58f4c887953b83f">More...</a><br /></td></tr>
<tr class="separator:ga75dffd37d7d0c364d58f4c887953b83f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae96a0892360cfffc7fa3b3919d35af4a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#gae96a0892360cfffc7fa3b3919d35af4a">XBRAM_CE_FFA_0_OFFSET</a>&#160;&#160;&#160;0x1C0</td></tr>
<tr class="memdesc:gae96a0892360cfffc7fa3b3919d35af4a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Correctable error first failing address Register 31-0.  <a href="#gae96a0892360cfffc7fa3b3919d35af4a">More...</a><br /></td></tr>
<tr class="separator:gae96a0892360cfffc7fa3b3919d35af4a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac43dab292efb11b1bd7a285552713bb7"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#gac43dab292efb11b1bd7a285552713bb7">XBRAM_CE_FFA_1_OFFSET</a>&#160;&#160;&#160;0x1C4</td></tr>
<tr class="memdesc:gac43dab292efb11b1bd7a285552713bb7"><td class="mdescLeft">&#160;</td><td class="mdescRight">Correctable error first failing address Register 63-32.  <a href="#gac43dab292efb11b1bd7a285552713bb7">More...</a><br /></td></tr>
<tr class="separator:gac43dab292efb11b1bd7a285552713bb7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae3cd6bccc199556243b6e055c9e3bcb6"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#gae3cd6bccc199556243b6e055c9e3bcb6">XBRAM_UE_FFD_0_OFFSET</a>&#160;&#160;&#160;0x200</td></tr>
<tr class="memdesc:gae3cd6bccc199556243b6e055c9e3bcb6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Uncorrectable error first failing data Register, 31-0.  <a href="#gae3cd6bccc199556243b6e055c9e3bcb6">More...</a><br /></td></tr>
<tr class="separator:gae3cd6bccc199556243b6e055c9e3bcb6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga020822cb899b212488baa0b907a1e0ff"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#ga020822cb899b212488baa0b907a1e0ff">XBRAM_UE_FFD_1_OFFSET</a>&#160;&#160;&#160;0x204</td></tr>
<tr class="memdesc:ga020822cb899b212488baa0b907a1e0ff"><td class="mdescLeft">&#160;</td><td class="mdescRight">Uncorrectable error first failing data Register, 63-32.  <a href="#ga020822cb899b212488baa0b907a1e0ff">More...</a><br /></td></tr>
<tr class="separator:ga020822cb899b212488baa0b907a1e0ff"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gadc99002d47b36d4cdc6f3d497c836367"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#gadc99002d47b36d4cdc6f3d497c836367">XBRAM_UE_FFD_2_OFFSET</a>&#160;&#160;&#160;0x208</td></tr>
<tr class="memdesc:gadc99002d47b36d4cdc6f3d497c836367"><td class="mdescLeft">&#160;</td><td class="mdescRight">Uncorrectable error first failing data Register, 95-64.  <a href="#gadc99002d47b36d4cdc6f3d497c836367">More...</a><br /></td></tr>
<tr class="separator:gadc99002d47b36d4cdc6f3d497c836367"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf277f72cc70d8588d491a07c89667c37"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#gaf277f72cc70d8588d491a07c89667c37">XBRAM_UE_FFD_3_OFFSET</a>&#160;&#160;&#160;0x20C</td></tr>
<tr class="memdesc:gaf277f72cc70d8588d491a07c89667c37"><td class="mdescLeft">&#160;</td><td class="mdescRight">Uncorrectable error first failing data Register, 127-96.  <a href="#gaf277f72cc70d8588d491a07c89667c37">More...</a><br /></td></tr>
<tr class="separator:gaf277f72cc70d8588d491a07c89667c37"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga19934429ae7fa3d24018f6f518863329"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#ga19934429ae7fa3d24018f6f518863329">XBRAM_UE_FFD_4_OFFSET</a>&#160;&#160;&#160;0x210</td></tr>
<tr class="memdesc:ga19934429ae7fa3d24018f6f518863329"><td class="mdescLeft">&#160;</td><td class="mdescRight">Uncorrectable error first failing data Register, 159-128.  <a href="#ga19934429ae7fa3d24018f6f518863329">More...</a><br /></td></tr>
<tr class="separator:ga19934429ae7fa3d24018f6f518863329"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gace645c7df0709c482d1c4893948ea8fc"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#gace645c7df0709c482d1c4893948ea8fc">XBRAM_UE_FFD_5_OFFSET</a>&#160;&#160;&#160;0x214</td></tr>
<tr class="memdesc:gace645c7df0709c482d1c4893948ea8fc"><td class="mdescLeft">&#160;</td><td class="mdescRight">Uncorrectable error first failing data Register, 191-160.  <a href="#gace645c7df0709c482d1c4893948ea8fc">More...</a><br /></td></tr>
<tr class="separator:gace645c7df0709c482d1c4893948ea8fc"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga991c6cca9fdaa5741f900edad1eda0f9"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#ga991c6cca9fdaa5741f900edad1eda0f9">XBRAM_UE_FFD_6_OFFSET</a>&#160;&#160;&#160;0x218</td></tr>
<tr class="memdesc:ga991c6cca9fdaa5741f900edad1eda0f9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Uncorrectable error first failing data Register, 223-192.  <a href="#ga991c6cca9fdaa5741f900edad1eda0f9">More...</a><br /></td></tr>
<tr class="separator:ga991c6cca9fdaa5741f900edad1eda0f9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad5e650ca47f6d403cc0c23c7f35926c5"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#gad5e650ca47f6d403cc0c23c7f35926c5">XBRAM_UE_FFD_7_OFFSET</a>&#160;&#160;&#160;0x21C</td></tr>
<tr class="memdesc:gad5e650ca47f6d403cc0c23c7f35926c5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Uncorrectable error first failing data Register, 255-224.  <a href="#gad5e650ca47f6d403cc0c23c7f35926c5">More...</a><br /></td></tr>
<tr class="separator:gad5e650ca47f6d403cc0c23c7f35926c5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gacfbd53de7823e3ca1281fda81bf0eee9"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#gacfbd53de7823e3ca1281fda81bf0eee9">XBRAM_UE_FFD_8_OFFSET</a>&#160;&#160;&#160;0x220</td></tr>
<tr class="memdesc:gacfbd53de7823e3ca1281fda81bf0eee9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Uncorrectable error first failing data Register, 287-256.  <a href="#gacfbd53de7823e3ca1281fda81bf0eee9">More...</a><br /></td></tr>
<tr class="separator:gacfbd53de7823e3ca1281fda81bf0eee9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga064745425d89b3f03090e6eab65511e9"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#ga064745425d89b3f03090e6eab65511e9">XBRAM_UE_FFD_9_OFFSET</a>&#160;&#160;&#160;0x224</td></tr>
<tr class="memdesc:ga064745425d89b3f03090e6eab65511e9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Uncorrectable error first failing data Register, 319-288.  <a href="#ga064745425d89b3f03090e6eab65511e9">More...</a><br /></td></tr>
<tr class="separator:ga064745425d89b3f03090e6eab65511e9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga51a163c0ff81cd783f6ca5cee38578c6"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#ga51a163c0ff81cd783f6ca5cee38578c6">XBRAM_UE_FFD_10_OFFSET</a>&#160;&#160;&#160;0x228</td></tr>
<tr class="memdesc:ga51a163c0ff81cd783f6ca5cee38578c6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Uncorrectable error first failing data Register, 351-320.  <a href="#ga51a163c0ff81cd783f6ca5cee38578c6">More...</a><br /></td></tr>
<tr class="separator:ga51a163c0ff81cd783f6ca5cee38578c6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5fa6a1deabc09186bad48d3ce8de751d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#ga5fa6a1deabc09186bad48d3ce8de751d">XBRAM_UE_FFD_11_OFFSET</a>&#160;&#160;&#160;0x22C</td></tr>
<tr class="memdesc:ga5fa6a1deabc09186bad48d3ce8de751d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Uncorrectable error first failing data Register, 383-352.  <a href="#ga5fa6a1deabc09186bad48d3ce8de751d">More...</a><br /></td></tr>
<tr class="separator:ga5fa6a1deabc09186bad48d3ce8de751d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga340cc5cf5e2021cdb80f1b3dc8096b1a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#ga340cc5cf5e2021cdb80f1b3dc8096b1a">XBRAM_UE_FFD_12_OFFSET</a>&#160;&#160;&#160;0x230</td></tr>
<tr class="memdesc:ga340cc5cf5e2021cdb80f1b3dc8096b1a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Uncorrectable error first failing data Register, 415-384.  <a href="#ga340cc5cf5e2021cdb80f1b3dc8096b1a">More...</a><br /></td></tr>
<tr class="separator:ga340cc5cf5e2021cdb80f1b3dc8096b1a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga287a2aa0e47e06e0b3573e737645e87d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#ga287a2aa0e47e06e0b3573e737645e87d">XBRAM_UE_FFD_13_OFFSET</a>&#160;&#160;&#160;0x234</td></tr>
<tr class="memdesc:ga287a2aa0e47e06e0b3573e737645e87d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Uncorrectable error first failing data Register, 447-416.  <a href="#ga287a2aa0e47e06e0b3573e737645e87d">More...</a><br /></td></tr>
<tr class="separator:ga287a2aa0e47e06e0b3573e737645e87d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5fab9920aa039d8c0f11d3c24dd2522c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#ga5fab9920aa039d8c0f11d3c24dd2522c">XBRAM_UE_FFD_14_OFFSET</a>&#160;&#160;&#160;0x238</td></tr>
<tr class="memdesc:ga5fab9920aa039d8c0f11d3c24dd2522c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Uncorrectable error first failing data Register, 479-448.  <a href="#ga5fab9920aa039d8c0f11d3c24dd2522c">More...</a><br /></td></tr>
<tr class="separator:ga5fab9920aa039d8c0f11d3c24dd2522c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga3954b06a008318176f626efd83879d9b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#ga3954b06a008318176f626efd83879d9b">XBRAM_UE_FFD_15_OFFSET</a>&#160;&#160;&#160;0x23C</td></tr>
<tr class="memdesc:ga3954b06a008318176f626efd83879d9b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Uncorrectable error first failing data Register, 511-480.  <a href="#ga3954b06a008318176f626efd83879d9b">More...</a><br /></td></tr>
<tr class="separator:ga3954b06a008318176f626efd83879d9b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga3913509be0f7ba4a818d07da1a832737"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#ga3913509be0f7ba4a818d07da1a832737">XBRAM_UE_FFD_16_OFFSET</a>&#160;&#160;&#160;0x240</td></tr>
<tr class="memdesc:ga3913509be0f7ba4a818d07da1a832737"><td class="mdescLeft">&#160;</td><td class="mdescRight">Uncorrectable error first failing data Register, 543-512.  <a href="#ga3913509be0f7ba4a818d07da1a832737">More...</a><br /></td></tr>
<tr class="separator:ga3913509be0f7ba4a818d07da1a832737"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8ac75eeb2a34e03a7a8520a8d639ed6d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#ga8ac75eeb2a34e03a7a8520a8d639ed6d">XBRAM_UE_FFD_17_OFFSET</a>&#160;&#160;&#160;0x244</td></tr>
<tr class="memdesc:ga8ac75eeb2a34e03a7a8520a8d639ed6d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Uncorrectable error first failing data Register, 575-544.  <a href="#ga8ac75eeb2a34e03a7a8520a8d639ed6d">More...</a><br /></td></tr>
<tr class="separator:ga8ac75eeb2a34e03a7a8520a8d639ed6d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4c9813cc90627cd51a47773cbf95f52a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#ga4c9813cc90627cd51a47773cbf95f52a">XBRAM_UE_FFD_18_OFFSET</a>&#160;&#160;&#160;0x248</td></tr>
<tr class="memdesc:ga4c9813cc90627cd51a47773cbf95f52a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Uncorrectable error first failing data Register, 607-576.  <a href="#ga4c9813cc90627cd51a47773cbf95f52a">More...</a><br /></td></tr>
<tr class="separator:ga4c9813cc90627cd51a47773cbf95f52a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae3aabef99425370d418dafe230790e88"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#gae3aabef99425370d418dafe230790e88">XBRAM_UE_FFD_19_OFFSET</a>&#160;&#160;&#160;0x24C</td></tr>
<tr class="memdesc:gae3aabef99425370d418dafe230790e88"><td class="mdescLeft">&#160;</td><td class="mdescRight">Uncorrectable error first failing data Register, 639-608.  <a href="#gae3aabef99425370d418dafe230790e88">More...</a><br /></td></tr>
<tr class="separator:gae3aabef99425370d418dafe230790e88"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga15ee9d19cf14b6fa4c85993906bba831"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#ga15ee9d19cf14b6fa4c85993906bba831">XBRAM_UE_FFD_20_OFFSET</a>&#160;&#160;&#160;0x250</td></tr>
<tr class="memdesc:ga15ee9d19cf14b6fa4c85993906bba831"><td class="mdescLeft">&#160;</td><td class="mdescRight">Uncorrectable error first failing data Register, 671-640.  <a href="#ga15ee9d19cf14b6fa4c85993906bba831">More...</a><br /></td></tr>
<tr class="separator:ga15ee9d19cf14b6fa4c85993906bba831"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga1dcdc21c8880d9aa3817070d834141ee"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#ga1dcdc21c8880d9aa3817070d834141ee">XBRAM_UE_FFD_21_OFFSET</a>&#160;&#160;&#160;0x254</td></tr>
<tr class="memdesc:ga1dcdc21c8880d9aa3817070d834141ee"><td class="mdescLeft">&#160;</td><td class="mdescRight">Uncorrectable error first failing data Register, 703-672.  <a href="#ga1dcdc21c8880d9aa3817070d834141ee">More...</a><br /></td></tr>
<tr class="separator:ga1dcdc21c8880d9aa3817070d834141ee"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa44103fb2588cb618503fa85f6ee2cdd"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#gaa44103fb2588cb618503fa85f6ee2cdd">XBRAM_UE_FFD_22_OFFSET</a>&#160;&#160;&#160;0x258</td></tr>
<tr class="memdesc:gaa44103fb2588cb618503fa85f6ee2cdd"><td class="mdescLeft">&#160;</td><td class="mdescRight">Uncorrectable error first failing data Register, 735-704.  <a href="#gaa44103fb2588cb618503fa85f6ee2cdd">More...</a><br /></td></tr>
<tr class="separator:gaa44103fb2588cb618503fa85f6ee2cdd"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf554747914f2c008c3f3bc88ae959f88"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#gaf554747914f2c008c3f3bc88ae959f88">XBRAM_UE_FFD_23_OFFSET</a>&#160;&#160;&#160;0x25C</td></tr>
<tr class="memdesc:gaf554747914f2c008c3f3bc88ae959f88"><td class="mdescLeft">&#160;</td><td class="mdescRight">Uncorrectable error first failing data Register, 767-736.  <a href="#gaf554747914f2c008c3f3bc88ae959f88">More...</a><br /></td></tr>
<tr class="separator:gaf554747914f2c008c3f3bc88ae959f88"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga88054e126d45f0c5365d00dacf730851"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#ga88054e126d45f0c5365d00dacf730851">XBRAM_UE_FFD_24_OFFSET</a>&#160;&#160;&#160;0x260</td></tr>
<tr class="memdesc:ga88054e126d45f0c5365d00dacf730851"><td class="mdescLeft">&#160;</td><td class="mdescRight">Uncorrectable error first failing data Register, 799-768.  <a href="#ga88054e126d45f0c5365d00dacf730851">More...</a><br /></td></tr>
<tr class="separator:ga88054e126d45f0c5365d00dacf730851"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga682f4fa42e60f80eaad9699e6602f100"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#ga682f4fa42e60f80eaad9699e6602f100">XBRAM_UE_FFD_25_OFFSET</a>&#160;&#160;&#160;0x264</td></tr>
<tr class="memdesc:ga682f4fa42e60f80eaad9699e6602f100"><td class="mdescLeft">&#160;</td><td class="mdescRight">Uncorrectable error first failing data Register, 831-800.  <a href="#ga682f4fa42e60f80eaad9699e6602f100">More...</a><br /></td></tr>
<tr class="separator:ga682f4fa42e60f80eaad9699e6602f100"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaeb56686ebf310e2de8d393eb9b3b5d2b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#gaeb56686ebf310e2de8d393eb9b3b5d2b">XBRAM_UE_FFD_26_OFFSET</a>&#160;&#160;&#160;0x268</td></tr>
<tr class="memdesc:gaeb56686ebf310e2de8d393eb9b3b5d2b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Uncorrectable error first failing data Register, 863-832.  <a href="#gaeb56686ebf310e2de8d393eb9b3b5d2b">More...</a><br /></td></tr>
<tr class="separator:gaeb56686ebf310e2de8d393eb9b3b5d2b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga1c2383b058df1f51f2d17a8490c297f6"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#ga1c2383b058df1f51f2d17a8490c297f6">XBRAM_UE_FFD_27_OFFSET</a>&#160;&#160;&#160;0x26C</td></tr>
<tr class="memdesc:ga1c2383b058df1f51f2d17a8490c297f6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Uncorrectable error first failing data Register, 895-864.  <a href="#ga1c2383b058df1f51f2d17a8490c297f6">More...</a><br /></td></tr>
<tr class="separator:ga1c2383b058df1f51f2d17a8490c297f6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga06d2e06dfc0a89e37ae11798af6dc289"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#ga06d2e06dfc0a89e37ae11798af6dc289">XBRAM_UE_FFD_28_OFFSET</a>&#160;&#160;&#160;0x270</td></tr>
<tr class="memdesc:ga06d2e06dfc0a89e37ae11798af6dc289"><td class="mdescLeft">&#160;</td><td class="mdescRight">Uncorrectable error first failing data Register, 927-896.  <a href="#ga06d2e06dfc0a89e37ae11798af6dc289">More...</a><br /></td></tr>
<tr class="separator:ga06d2e06dfc0a89e37ae11798af6dc289"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga62f24e3b288b752071ebbaffb61b436c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#ga62f24e3b288b752071ebbaffb61b436c">XBRAM_UE_FFD_29_OFFSET</a>&#160;&#160;&#160;0x274</td></tr>
<tr class="memdesc:ga62f24e3b288b752071ebbaffb61b436c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Uncorrectable error first failing data Register, 959-928.  <a href="#ga62f24e3b288b752071ebbaffb61b436c">More...</a><br /></td></tr>
<tr class="separator:ga62f24e3b288b752071ebbaffb61b436c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac6b0c902d6e9f2f2ff1fc50fc103882f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#gac6b0c902d6e9f2f2ff1fc50fc103882f">XBRAM_UE_FFD_30_OFFSET</a>&#160;&#160;&#160;0x278</td></tr>
<tr class="memdesc:gac6b0c902d6e9f2f2ff1fc50fc103882f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Uncorrectable error first failing data Register, 991-960.  <a href="#gac6b0c902d6e9f2f2ff1fc50fc103882f">More...</a><br /></td></tr>
<tr class="separator:gac6b0c902d6e9f2f2ff1fc50fc103882f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga93a70726c0f7980c86431bf3679280e2"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#ga93a70726c0f7980c86431bf3679280e2">XBRAM_UE_FFD_31_OFFSET</a>&#160;&#160;&#160;0x27C</td></tr>
<tr class="memdesc:ga93a70726c0f7980c86431bf3679280e2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Uncorrectable error first failing data Register, 1023-992.  <a href="#ga93a70726c0f7980c86431bf3679280e2">More...</a><br /></td></tr>
<tr class="separator:ga93a70726c0f7980c86431bf3679280e2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gace262620dce703d728892d4091962a92"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#gace262620dce703d728892d4091962a92">XBRAM_UE_FFE_0_OFFSET</a>&#160;&#160;&#160;0x280</td></tr>
<tr class="memdesc:gace262620dce703d728892d4091962a92"><td class="mdescLeft">&#160;</td><td class="mdescRight">Uncorrectable error first failing ECC Register, 31-0.  <a href="#gace262620dce703d728892d4091962a92">More...</a><br /></td></tr>
<tr class="separator:gace262620dce703d728892d4091962a92"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga24653240a4fb4e604c851da56e14ad5d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#ga24653240a4fb4e604c851da56e14ad5d">XBRAM_UE_FFE_1_OFFSET</a>&#160;&#160;&#160;0x284</td></tr>
<tr class="memdesc:ga24653240a4fb4e604c851da56e14ad5d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Uncorrectable error first failing ECC Register, 63-32.  <a href="#ga24653240a4fb4e604c851da56e14ad5d">More...</a><br /></td></tr>
<tr class="separator:ga24653240a4fb4e604c851da56e14ad5d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad538dc3e048d58f1a740b820dd9435f1"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#gad538dc3e048d58f1a740b820dd9435f1">XBRAM_UE_FFE_2_OFFSET</a>&#160;&#160;&#160;0x288</td></tr>
<tr class="memdesc:gad538dc3e048d58f1a740b820dd9435f1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Uncorrectable error first failing ECC Register, 95-64.  <a href="#gad538dc3e048d58f1a740b820dd9435f1">More...</a><br /></td></tr>
<tr class="separator:gad538dc3e048d58f1a740b820dd9435f1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaaa71a742311aedc8025ad23ade124298"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#gaaa71a742311aedc8025ad23ade124298">XBRAM_UE_FFE_3_OFFSET</a>&#160;&#160;&#160;0x28C</td></tr>
<tr class="memdesc:gaaa71a742311aedc8025ad23ade124298"><td class="mdescLeft">&#160;</td><td class="mdescRight">Uncorrectable error first failing ECC Register, 127-96.  <a href="#gaaa71a742311aedc8025ad23ade124298">More...</a><br /></td></tr>
<tr class="separator:gaaa71a742311aedc8025ad23ade124298"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5d745fd5f8a6af5f88e929be6a976d27"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#ga5d745fd5f8a6af5f88e929be6a976d27">XBRAM_UE_FFE_4_OFFSET</a>&#160;&#160;&#160;0x290</td></tr>
<tr class="memdesc:ga5d745fd5f8a6af5f88e929be6a976d27"><td class="mdescLeft">&#160;</td><td class="mdescRight">Uncorrectable error first failing ECC Register, 159-128.  <a href="#ga5d745fd5f8a6af5f88e929be6a976d27">More...</a><br /></td></tr>
<tr class="separator:ga5d745fd5f8a6af5f88e929be6a976d27"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga2036da79fe3041d68a87eeacb9752d21"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#ga2036da79fe3041d68a87eeacb9752d21">XBRAM_UE_FFE_5_OFFSET</a>&#160;&#160;&#160;0x294</td></tr>
<tr class="memdesc:ga2036da79fe3041d68a87eeacb9752d21"><td class="mdescLeft">&#160;</td><td class="mdescRight">Uncorrectable error first failing ECC Register, 191-160.  <a href="#ga2036da79fe3041d68a87eeacb9752d21">More...</a><br /></td></tr>
<tr class="separator:ga2036da79fe3041d68a87eeacb9752d21"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gacda7d9738f05d3e7d3287e7fa27ac2a3"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#gacda7d9738f05d3e7d3287e7fa27ac2a3">XBRAM_UE_FFE_6_OFFSET</a>&#160;&#160;&#160;0x298</td></tr>
<tr class="memdesc:gacda7d9738f05d3e7d3287e7fa27ac2a3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Uncorrectable error first failing ECC Register, 223-192.  <a href="#gacda7d9738f05d3e7d3287e7fa27ac2a3">More...</a><br /></td></tr>
<tr class="separator:gacda7d9738f05d3e7d3287e7fa27ac2a3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaeff9efbeedd055f223f53b215653d367"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#gaeff9efbeedd055f223f53b215653d367">XBRAM_UE_FFE_7_OFFSET</a>&#160;&#160;&#160;0x29C</td></tr>
<tr class="memdesc:gaeff9efbeedd055f223f53b215653d367"><td class="mdescLeft">&#160;</td><td class="mdescRight">Uncorrectable error first failing ECC Register, 255-224.  <a href="#gaeff9efbeedd055f223f53b215653d367">More...</a><br /></td></tr>
<tr class="separator:gaeff9efbeedd055f223f53b215653d367"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga2668f65a7a32f076244671b399e7e22a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#ga2668f65a7a32f076244671b399e7e22a">XBRAM_UE_FFA_0_OFFSET</a>&#160;&#160;&#160;0x2C0</td></tr>
<tr class="memdesc:ga2668f65a7a32f076244671b399e7e22a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Uncorrectable error first failing address Register 31-0.  <a href="#ga2668f65a7a32f076244671b399e7e22a">More...</a><br /></td></tr>
<tr class="separator:ga2668f65a7a32f076244671b399e7e22a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gace4bc70050f62d21da25858032b4dc09"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#gace4bc70050f62d21da25858032b4dc09">XBRAM_UE_FFA_1_OFFSET</a>&#160;&#160;&#160;0x2C4</td></tr>
<tr class="memdesc:gace4bc70050f62d21da25858032b4dc09"><td class="mdescLeft">&#160;</td><td class="mdescRight">Uncorrectable error first failing address Register 63-32.  <a href="#gace4bc70050f62d21da25858032b4dc09">More...</a><br /></td></tr>
<tr class="separator:gace4bc70050f62d21da25858032b4dc09"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4327d8d346ed2ff2258df3897efcbcac"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#ga4327d8d346ed2ff2258df3897efcbcac">XBRAM_FI_D_0_OFFSET</a>&#160;&#160;&#160;0x300</td></tr>
<tr class="memdesc:ga4327d8d346ed2ff2258df3897efcbcac"><td class="mdescLeft">&#160;</td><td class="mdescRight">Fault injection Data Register, 31-0.  <a href="#ga4327d8d346ed2ff2258df3897efcbcac">More...</a><br /></td></tr>
<tr class="separator:ga4327d8d346ed2ff2258df3897efcbcac"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga167bc4cbc6b7419cc695926fced4c81f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#ga167bc4cbc6b7419cc695926fced4c81f">XBRAM_FI_D_1_OFFSET</a>&#160;&#160;&#160;0x304</td></tr>
<tr class="memdesc:ga167bc4cbc6b7419cc695926fced4c81f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Fault injection Data Register, 63-32.  <a href="#ga167bc4cbc6b7419cc695926fced4c81f">More...</a><br /></td></tr>
<tr class="separator:ga167bc4cbc6b7419cc695926fced4c81f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9f6cc6e12cfa98ec984c4cb3e098b788"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#ga9f6cc6e12cfa98ec984c4cb3e098b788">XBRAM_FI_D_2_OFFSET</a>&#160;&#160;&#160;0x308</td></tr>
<tr class="memdesc:ga9f6cc6e12cfa98ec984c4cb3e098b788"><td class="mdescLeft">&#160;</td><td class="mdescRight">Fault injection Data Register, 95-64.  <a href="#ga9f6cc6e12cfa98ec984c4cb3e098b788">More...</a><br /></td></tr>
<tr class="separator:ga9f6cc6e12cfa98ec984c4cb3e098b788"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga3029a3c7c79f9f140ba14c96b38831a8"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#ga3029a3c7c79f9f140ba14c96b38831a8">XBRAM_FI_D_3_OFFSET</a>&#160;&#160;&#160;0x30C</td></tr>
<tr class="memdesc:ga3029a3c7c79f9f140ba14c96b38831a8"><td class="mdescLeft">&#160;</td><td class="mdescRight">Fault injection Data Register, 127-96.  <a href="#ga3029a3c7c79f9f140ba14c96b38831a8">More...</a><br /></td></tr>
<tr class="separator:ga3029a3c7c79f9f140ba14c96b38831a8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gadc1261408bc53307c6115765559c20aa"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#gadc1261408bc53307c6115765559c20aa">XBRAM_FI_D_4_OFFSET</a>&#160;&#160;&#160;0x310</td></tr>
<tr class="memdesc:gadc1261408bc53307c6115765559c20aa"><td class="mdescLeft">&#160;</td><td class="mdescRight">Fault injection Data Register, 159-128.  <a href="#gadc1261408bc53307c6115765559c20aa">More...</a><br /></td></tr>
<tr class="separator:gadc1261408bc53307c6115765559c20aa"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gadf7ec54c98166a66aaf97e6e3c6bb471"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#gadf7ec54c98166a66aaf97e6e3c6bb471">XBRAM_FI_D_5_OFFSET</a>&#160;&#160;&#160;0x314</td></tr>
<tr class="memdesc:gadf7ec54c98166a66aaf97e6e3c6bb471"><td class="mdescLeft">&#160;</td><td class="mdescRight">Fault injection Data Register, 191-160.  <a href="#gadf7ec54c98166a66aaf97e6e3c6bb471">More...</a><br /></td></tr>
<tr class="separator:gadf7ec54c98166a66aaf97e6e3c6bb471"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga50539ee3694da7ffec33e702bae35b6c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#ga50539ee3694da7ffec33e702bae35b6c">XBRAM_FI_D_6_OFFSET</a>&#160;&#160;&#160;0x318</td></tr>
<tr class="memdesc:ga50539ee3694da7ffec33e702bae35b6c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Fault injection Data Register, 223-192.  <a href="#ga50539ee3694da7ffec33e702bae35b6c">More...</a><br /></td></tr>
<tr class="separator:ga50539ee3694da7ffec33e702bae35b6c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga6ba64bfd64c2ecb72658ad84dd8682c4"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#ga6ba64bfd64c2ecb72658ad84dd8682c4">XBRAM_FI_D_7_OFFSET</a>&#160;&#160;&#160;0x31C</td></tr>
<tr class="memdesc:ga6ba64bfd64c2ecb72658ad84dd8682c4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Fault injection Data Register, 255-224.  <a href="#ga6ba64bfd64c2ecb72658ad84dd8682c4">More...</a><br /></td></tr>
<tr class="separator:ga6ba64bfd64c2ecb72658ad84dd8682c4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga34276fc1ad44947d1545b3a60a42613c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#ga34276fc1ad44947d1545b3a60a42613c">XBRAM_FI_D_8_OFFSET</a>&#160;&#160;&#160;0x320</td></tr>
<tr class="memdesc:ga34276fc1ad44947d1545b3a60a42613c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Fault injection Data Register, 287-256.  <a href="#ga34276fc1ad44947d1545b3a60a42613c">More...</a><br /></td></tr>
<tr class="separator:ga34276fc1ad44947d1545b3a60a42613c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab3431301bd1dcbb1f1ef04509a278140"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#gab3431301bd1dcbb1f1ef04509a278140">XBRAM_FI_D_9_OFFSET</a>&#160;&#160;&#160;0x324</td></tr>
<tr class="memdesc:gab3431301bd1dcbb1f1ef04509a278140"><td class="mdescLeft">&#160;</td><td class="mdescRight">Fault injection Data Register, 319-288.  <a href="#gab3431301bd1dcbb1f1ef04509a278140">More...</a><br /></td></tr>
<tr class="separator:gab3431301bd1dcbb1f1ef04509a278140"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gacf3ff9e2d2cb7d4f322c500d85627490"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#gacf3ff9e2d2cb7d4f322c500d85627490">XBRAM_FI_D_10_OFFSET</a>&#160;&#160;&#160;0x328</td></tr>
<tr class="memdesc:gacf3ff9e2d2cb7d4f322c500d85627490"><td class="mdescLeft">&#160;</td><td class="mdescRight">Fault injection Data Register, 351-320.  <a href="#gacf3ff9e2d2cb7d4f322c500d85627490">More...</a><br /></td></tr>
<tr class="separator:gacf3ff9e2d2cb7d4f322c500d85627490"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac771132cbf4274f62afe142bd7ff2ea2"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#gac771132cbf4274f62afe142bd7ff2ea2">XBRAM_FI_D_11_OFFSET</a>&#160;&#160;&#160;0x32C</td></tr>
<tr class="memdesc:gac771132cbf4274f62afe142bd7ff2ea2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Fault injection Data Register, 383-352.  <a href="#gac771132cbf4274f62afe142bd7ff2ea2">More...</a><br /></td></tr>
<tr class="separator:gac771132cbf4274f62afe142bd7ff2ea2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad2f25266372cc0e30e16b7d0db59225f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#gad2f25266372cc0e30e16b7d0db59225f">XBRAM_FI_D_12_OFFSET</a>&#160;&#160;&#160;0x330</td></tr>
<tr class="memdesc:gad2f25266372cc0e30e16b7d0db59225f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Fault injection Data Register, 415-384.  <a href="#gad2f25266372cc0e30e16b7d0db59225f">More...</a><br /></td></tr>
<tr class="separator:gad2f25266372cc0e30e16b7d0db59225f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad0396bceb3bb788d56ccf185b85aa6a9"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#gad0396bceb3bb788d56ccf185b85aa6a9">XBRAM_FI_D_13_OFFSET</a>&#160;&#160;&#160;0x334</td></tr>
<tr class="memdesc:gad0396bceb3bb788d56ccf185b85aa6a9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Fault injection Data Register, 447-416.  <a href="#gad0396bceb3bb788d56ccf185b85aa6a9">More...</a><br /></td></tr>
<tr class="separator:gad0396bceb3bb788d56ccf185b85aa6a9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaaca82f0ca4d7173cd674b954026108fb"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#gaaca82f0ca4d7173cd674b954026108fb">XBRAM_FI_D_14_OFFSET</a>&#160;&#160;&#160;0x338</td></tr>
<tr class="memdesc:gaaca82f0ca4d7173cd674b954026108fb"><td class="mdescLeft">&#160;</td><td class="mdescRight">Fault injection Data Register, 479-448.  <a href="#gaaca82f0ca4d7173cd674b954026108fb">More...</a><br /></td></tr>
<tr class="separator:gaaca82f0ca4d7173cd674b954026108fb"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga213c6e8d33faa8e918b88f4132c3251c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#ga213c6e8d33faa8e918b88f4132c3251c">XBRAM_FI_D_15_OFFSET</a>&#160;&#160;&#160;0x33C</td></tr>
<tr class="memdesc:ga213c6e8d33faa8e918b88f4132c3251c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Fault injection Data Register, 511-480.  <a href="#ga213c6e8d33faa8e918b88f4132c3251c">More...</a><br /></td></tr>
<tr class="separator:ga213c6e8d33faa8e918b88f4132c3251c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf76da6dc3f5451299ed0cc1a514abd19"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#gaf76da6dc3f5451299ed0cc1a514abd19">XBRAM_FI_D_16_OFFSET</a>&#160;&#160;&#160;0x340</td></tr>
<tr class="memdesc:gaf76da6dc3f5451299ed0cc1a514abd19"><td class="mdescLeft">&#160;</td><td class="mdescRight">Fault injection Data Register, 543-512.  <a href="#gaf76da6dc3f5451299ed0cc1a514abd19">More...</a><br /></td></tr>
<tr class="separator:gaf76da6dc3f5451299ed0cc1a514abd19"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga1fcd0a4e54ef5703186d022defd87d3a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#ga1fcd0a4e54ef5703186d022defd87d3a">XBRAM_FI_D_17_OFFSET</a>&#160;&#160;&#160;0x344</td></tr>
<tr class="memdesc:ga1fcd0a4e54ef5703186d022defd87d3a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Fault injection Data Register, 575-544.  <a href="#ga1fcd0a4e54ef5703186d022defd87d3a">More...</a><br /></td></tr>
<tr class="separator:ga1fcd0a4e54ef5703186d022defd87d3a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga878d7b4a4e7182fc5552b679089828e1"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#ga878d7b4a4e7182fc5552b679089828e1">XBRAM_FI_D_18_OFFSET</a>&#160;&#160;&#160;0x348</td></tr>
<tr class="memdesc:ga878d7b4a4e7182fc5552b679089828e1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Fault injection Data Register, 607-576.  <a href="#ga878d7b4a4e7182fc5552b679089828e1">More...</a><br /></td></tr>
<tr class="separator:ga878d7b4a4e7182fc5552b679089828e1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga205e9bf1a66308b549f2122ebb6b347d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#ga205e9bf1a66308b549f2122ebb6b347d">XBRAM_FI_D_19_OFFSET</a>&#160;&#160;&#160;0x34C</td></tr>
<tr class="memdesc:ga205e9bf1a66308b549f2122ebb6b347d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Fault injection Data Register, 639-608.  <a href="#ga205e9bf1a66308b549f2122ebb6b347d">More...</a><br /></td></tr>
<tr class="separator:ga205e9bf1a66308b549f2122ebb6b347d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga46cf5511cb6949ddec9ef23ddaf4bc0d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#ga46cf5511cb6949ddec9ef23ddaf4bc0d">XBRAM_FI_D_20_OFFSET</a>&#160;&#160;&#160;0x350</td></tr>
<tr class="memdesc:ga46cf5511cb6949ddec9ef23ddaf4bc0d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Fault injection Data Register, 671-640.  <a href="#ga46cf5511cb6949ddec9ef23ddaf4bc0d">More...</a><br /></td></tr>
<tr class="separator:ga46cf5511cb6949ddec9ef23ddaf4bc0d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab3a504a7e6e2e2f2a79d710c7d082939"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#gab3a504a7e6e2e2f2a79d710c7d082939">XBRAM_FI_D_21_OFFSET</a>&#160;&#160;&#160;0x354</td></tr>
<tr class="memdesc:gab3a504a7e6e2e2f2a79d710c7d082939"><td class="mdescLeft">&#160;</td><td class="mdescRight">Fault injection Data Register, 703-672.  <a href="#gab3a504a7e6e2e2f2a79d710c7d082939">More...</a><br /></td></tr>
<tr class="separator:gab3a504a7e6e2e2f2a79d710c7d082939"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga0a9250291f63e7d27f7bbac3d30d66c5"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#ga0a9250291f63e7d27f7bbac3d30d66c5">XBRAM_FI_D_22_OFFSET</a>&#160;&#160;&#160;0x358</td></tr>
<tr class="memdesc:ga0a9250291f63e7d27f7bbac3d30d66c5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Fault injection Data Register, 735-704.  <a href="#ga0a9250291f63e7d27f7bbac3d30d66c5">More...</a><br /></td></tr>
<tr class="separator:ga0a9250291f63e7d27f7bbac3d30d66c5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga17bc17dd12706c541ee4b32fb4d8c5ce"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#ga17bc17dd12706c541ee4b32fb4d8c5ce">XBRAM_FI_D_23_OFFSET</a>&#160;&#160;&#160;0x35C</td></tr>
<tr class="memdesc:ga17bc17dd12706c541ee4b32fb4d8c5ce"><td class="mdescLeft">&#160;</td><td class="mdescRight">Fault injection Data Register, 767-736.  <a href="#ga17bc17dd12706c541ee4b32fb4d8c5ce">More...</a><br /></td></tr>
<tr class="separator:ga17bc17dd12706c541ee4b32fb4d8c5ce"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5292e1f3c0ff481c4a181520f963e5a0"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#ga5292e1f3c0ff481c4a181520f963e5a0">XBRAM_FI_D_24_OFFSET</a>&#160;&#160;&#160;0x360</td></tr>
<tr class="memdesc:ga5292e1f3c0ff481c4a181520f963e5a0"><td class="mdescLeft">&#160;</td><td class="mdescRight">Fault injection Data Register, 799-768.  <a href="#ga5292e1f3c0ff481c4a181520f963e5a0">More...</a><br /></td></tr>
<tr class="separator:ga5292e1f3c0ff481c4a181520f963e5a0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gabcd8cd94272a7fa34de7c4c28b407825"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#gabcd8cd94272a7fa34de7c4c28b407825">XBRAM_FI_D_25_OFFSET</a>&#160;&#160;&#160;0x364</td></tr>
<tr class="memdesc:gabcd8cd94272a7fa34de7c4c28b407825"><td class="mdescLeft">&#160;</td><td class="mdescRight">Fault injection Data Register, 831-800.  <a href="#gabcd8cd94272a7fa34de7c4c28b407825">More...</a><br /></td></tr>
<tr class="separator:gabcd8cd94272a7fa34de7c4c28b407825"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4b1e60432d61c19d78666f716dcf7204"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#ga4b1e60432d61c19d78666f716dcf7204">XBRAM_FI_D_26_OFFSET</a>&#160;&#160;&#160;0x368</td></tr>
<tr class="memdesc:ga4b1e60432d61c19d78666f716dcf7204"><td class="mdescLeft">&#160;</td><td class="mdescRight">Fault injection Data Register, 863-832.  <a href="#ga4b1e60432d61c19d78666f716dcf7204">More...</a><br /></td></tr>
<tr class="separator:ga4b1e60432d61c19d78666f716dcf7204"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9ac5e4cdcdce0073e6ba27bab4bdb190"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#ga9ac5e4cdcdce0073e6ba27bab4bdb190">XBRAM_FI_D_27_OFFSET</a>&#160;&#160;&#160;0x36C</td></tr>
<tr class="memdesc:ga9ac5e4cdcdce0073e6ba27bab4bdb190"><td class="mdescLeft">&#160;</td><td class="mdescRight">Fault injection Data Register, 895-864.  <a href="#ga9ac5e4cdcdce0073e6ba27bab4bdb190">More...</a><br /></td></tr>
<tr class="separator:ga9ac5e4cdcdce0073e6ba27bab4bdb190"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga13b4e7320cd339df9a4dc634c5532e56"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#ga13b4e7320cd339df9a4dc634c5532e56">XBRAM_FI_D_28_OFFSET</a>&#160;&#160;&#160;0x370</td></tr>
<tr class="memdesc:ga13b4e7320cd339df9a4dc634c5532e56"><td class="mdescLeft">&#160;</td><td class="mdescRight">Fault injection Data Register, 927-896.  <a href="#ga13b4e7320cd339df9a4dc634c5532e56">More...</a><br /></td></tr>
<tr class="separator:ga13b4e7320cd339df9a4dc634c5532e56"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga821ce4763c0423eb0464ad3f24f69f36"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#ga821ce4763c0423eb0464ad3f24f69f36">XBRAM_FI_D_29_OFFSET</a>&#160;&#160;&#160;0x374</td></tr>
<tr class="memdesc:ga821ce4763c0423eb0464ad3f24f69f36"><td class="mdescLeft">&#160;</td><td class="mdescRight">Fault injection Data Register, 959-928.  <a href="#ga821ce4763c0423eb0464ad3f24f69f36">More...</a><br /></td></tr>
<tr class="separator:ga821ce4763c0423eb0464ad3f24f69f36"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4c50d9511de680aa9ab19173c0095a8e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#ga4c50d9511de680aa9ab19173c0095a8e">XBRAM_FI_D_30_OFFSET</a>&#160;&#160;&#160;0x378</td></tr>
<tr class="memdesc:ga4c50d9511de680aa9ab19173c0095a8e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Fault injection Data Register, 991-960.  <a href="#ga4c50d9511de680aa9ab19173c0095a8e">More...</a><br /></td></tr>
<tr class="separator:ga4c50d9511de680aa9ab19173c0095a8e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga6a322042e5de4e040a05afac619234e3"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#ga6a322042e5de4e040a05afac619234e3">XBRAM_FI_D_31_OFFSET</a>&#160;&#160;&#160;0x37C</td></tr>
<tr class="memdesc:ga6a322042e5de4e040a05afac619234e3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Fault injection Data Register, 1023-992.  <a href="#ga6a322042e5de4e040a05afac619234e3">More...</a><br /></td></tr>
<tr class="separator:ga6a322042e5de4e040a05afac619234e3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga50aa03f49e4a6d7cfe7f463f8f7f07e1"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#ga50aa03f49e4a6d7cfe7f463f8f7f07e1">XBRAM_FI_ECC_0_OFFSET</a>&#160;&#160;&#160;0x380</td></tr>
<tr class="memdesc:ga50aa03f49e4a6d7cfe7f463f8f7f07e1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Fault injection ECC Register, 31-0.  <a href="#ga50aa03f49e4a6d7cfe7f463f8f7f07e1">More...</a><br /></td></tr>
<tr class="separator:ga50aa03f49e4a6d7cfe7f463f8f7f07e1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4ca449a3a5d6dc1367a8a1846c8412dc"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#ga4ca449a3a5d6dc1367a8a1846c8412dc">XBRAM_FI_ECC_1_OFFSET</a>&#160;&#160;&#160;0x384</td></tr>
<tr class="memdesc:ga4ca449a3a5d6dc1367a8a1846c8412dc"><td class="mdescLeft">&#160;</td><td class="mdescRight">Fault injection ECC Register, 63-32.  <a href="#ga4ca449a3a5d6dc1367a8a1846c8412dc">More...</a><br /></td></tr>
<tr class="separator:ga4ca449a3a5d6dc1367a8a1846c8412dc"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab1a7c145c2051e173bd7a552079dde3c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#gab1a7c145c2051e173bd7a552079dde3c">XBRAM_FI_ECC_2_OFFSET</a>&#160;&#160;&#160;0x388</td></tr>
<tr class="memdesc:gab1a7c145c2051e173bd7a552079dde3c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Fault injection ECC Register, 95-64.  <a href="#gab1a7c145c2051e173bd7a552079dde3c">More...</a><br /></td></tr>
<tr class="separator:gab1a7c145c2051e173bd7a552079dde3c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga242c5934b9a6d44f728d9f3e79273de7"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#ga242c5934b9a6d44f728d9f3e79273de7">XBRAM_FI_ECC_3_OFFSET</a>&#160;&#160;&#160;0x38C</td></tr>
<tr class="memdesc:ga242c5934b9a6d44f728d9f3e79273de7"><td class="mdescLeft">&#160;</td><td class="mdescRight">Fault injection ECC Register, 127-96.  <a href="#ga242c5934b9a6d44f728d9f3e79273de7">More...</a><br /></td></tr>
<tr class="separator:ga242c5934b9a6d44f728d9f3e79273de7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga37e4b9036be2eb508976c48ddab45f81"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#ga37e4b9036be2eb508976c48ddab45f81">XBRAM_FI_ECC_4_OFFSET</a>&#160;&#160;&#160;0x390</td></tr>
<tr class="memdesc:ga37e4b9036be2eb508976c48ddab45f81"><td class="mdescLeft">&#160;</td><td class="mdescRight">Fault injection ECC Register, 159-128.  <a href="#ga37e4b9036be2eb508976c48ddab45f81">More...</a><br /></td></tr>
<tr class="separator:ga37e4b9036be2eb508976c48ddab45f81"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab00c62906a72e957204b8b53fb45518f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#gab00c62906a72e957204b8b53fb45518f">XBRAM_FI_ECC_5_OFFSET</a>&#160;&#160;&#160;0x394</td></tr>
<tr class="memdesc:gab00c62906a72e957204b8b53fb45518f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Fault injection ECC Register, 191-160.  <a href="#gab00c62906a72e957204b8b53fb45518f">More...</a><br /></td></tr>
<tr class="separator:gab00c62906a72e957204b8b53fb45518f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga847d106f744e61162ef6788733623cb0"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#ga847d106f744e61162ef6788733623cb0">XBRAM_FI_ECC_6_OFFSET</a>&#160;&#160;&#160;0x398</td></tr>
<tr class="memdesc:ga847d106f744e61162ef6788733623cb0"><td class="mdescLeft">&#160;</td><td class="mdescRight">Fault injection ECC Register, 223-192.  <a href="#ga847d106f744e61162ef6788733623cb0">More...</a><br /></td></tr>
<tr class="separator:ga847d106f744e61162ef6788733623cb0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gacbb201dcba8ad81f0b95680074718824"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#gacbb201dcba8ad81f0b95680074718824">XBRAM_FI_ECC_7_OFFSET</a>&#160;&#160;&#160;0x39C</td></tr>
<tr class="memdesc:gacbb201dcba8ad81f0b95680074718824"><td class="mdescLeft">&#160;</td><td class="mdescRight">Fault injection ECC Register, 255-224.  <a href="#gacbb201dcba8ad81f0b95680074718824">More...</a><br /></td></tr>
<tr class="separator:gacbb201dcba8ad81f0b95680074718824"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="member-group"></a>
Interrupt Status and Enable Register bitmaps and masks</h2></td></tr>
<tr><td class="ititle" colspan="2"><p><a class="anchor" id="amgrp06e64022f503ac170140e995ad29c0ba"></a>Bit definitions for the ECC status register and ECC interrupt enable register. </p>
</td></tr>
<tr class="memitem:ga20bf7d2989ac1a6106bee563c75c236e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#ga20bf7d2989ac1a6106bee563c75c236e">XBRAM_IR_CE_MASK</a>&#160;&#160;&#160;0x2</td></tr>
<tr class="memdesc:ga20bf7d2989ac1a6106bee563c75c236e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Mask for the correctable error.  <a href="#ga20bf7d2989ac1a6106bee563c75c236e">More...</a><br /></td></tr>
<tr class="separator:ga20bf7d2989ac1a6106bee563c75c236e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga2802e1adab23086a18d40feaa21647ab"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#ga2802e1adab23086a18d40feaa21647ab">XBRAM_IR_UE_MASK</a>&#160;&#160;&#160;0x1</td></tr>
<tr class="memdesc:ga2802e1adab23086a18d40feaa21647ab"><td class="mdescLeft">&#160;</td><td class="mdescRight">Mask for the uncorrectable error.  <a href="#ga2802e1adab23086a18d40feaa21647ab">More...</a><br /></td></tr>
<tr class="separator:ga2802e1adab23086a18d40feaa21647ab"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8b01c0b7cae31073a32887283a730adf"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__bram__v4__0.html#ga8b01c0b7cae31073a32887283a730adf">XBRAM_IR_ALL_MASK</a>&#160;&#160;&#160;0x3</td></tr>
<tr class="memdesc:ga8b01c0b7cae31073a32887283a730adf"><td class="mdescLeft">&#160;</td><td class="mdescRight">Mask of all bits.  <a href="#ga8b01c0b7cae31073a32887283a730adf">More...</a><br /></td></tr>
<tr class="separator:ga8b01c0b7cae31073a32887283a730adf"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table>
<h2 class="groupheader">Macro Definition Documentation</h2>
<a id="ga5984531e736eafd1a13193da61cba776"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga5984531e736eafd1a13193da61cba776">&#9670;&nbsp;</a></span>XBRAM_CE_CNT_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_CE_CNT_OFFSET&#160;&#160;&#160;0xC</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Correctable error counter Register. </p>

</div>
</div>
<a id="gae96a0892360cfffc7fa3b3919d35af4a"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gae96a0892360cfffc7fa3b3919d35af4a">&#9670;&nbsp;</a></span>XBRAM_CE_FFA_0_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_CE_FFA_0_OFFSET&#160;&#160;&#160;0x1C0</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Correctable error first failing address Register 31-0. </p>

</div>
</div>
<a id="gac43dab292efb11b1bd7a285552713bb7"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gac43dab292efb11b1bd7a285552713bb7">&#9670;&nbsp;</a></span>XBRAM_CE_FFA_1_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_CE_FFA_1_OFFSET&#160;&#160;&#160;0x1C4</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Correctable error first failing address Register 63-32. </p>

</div>
</div>
<a id="gad84de0d6fe7b326b75f3a204f09bcb6c"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gad84de0d6fe7b326b75f3a204f09bcb6c">&#9670;&nbsp;</a></span>XBRAM_CE_FFD_0_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_CE_FFD_0_OFFSET&#160;&#160;&#160;0x100</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Correctable error first failing data Register, 31-0. </p>

</div>
</div>
<a id="ga00296613e6a8e8bd4c9909667fb3e676"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga00296613e6a8e8bd4c9909667fb3e676">&#9670;&nbsp;</a></span>XBRAM_CE_FFD_10_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_CE_FFD_10_OFFSET&#160;&#160;&#160;0x128</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Correctable error first failing data Register, 351-320. </p>

</div>
</div>
<a id="ga3c2b4f9ea2b4a54b0c344e28e1f6b5e6"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga3c2b4f9ea2b4a54b0c344e28e1f6b5e6">&#9670;&nbsp;</a></span>XBRAM_CE_FFD_11_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_CE_FFD_11_OFFSET&#160;&#160;&#160;0x12C</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Correctable error first failing data Register, 383-352. </p>

</div>
</div>
<a id="ga37f64a964cff8950a5a2e6218eb1862b"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga37f64a964cff8950a5a2e6218eb1862b">&#9670;&nbsp;</a></span>XBRAM_CE_FFD_12_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_CE_FFD_12_OFFSET&#160;&#160;&#160;0x130</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Correctable error first failing data Register, 415-384. </p>

</div>
</div>
<a id="ga660100eb180ce92f5867c54e4b5aadc3"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga660100eb180ce92f5867c54e4b5aadc3">&#9670;&nbsp;</a></span>XBRAM_CE_FFD_13_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_CE_FFD_13_OFFSET&#160;&#160;&#160;0x134</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Correctable error first failing data Register, 447-416. </p>

</div>
</div>
<a id="ga7b7b39f7a8bce2acd90325d9a64348a5"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga7b7b39f7a8bce2acd90325d9a64348a5">&#9670;&nbsp;</a></span>XBRAM_CE_FFD_14_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_CE_FFD_14_OFFSET&#160;&#160;&#160;0x138</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Correctable error first failing data Register, 479-448. </p>

</div>
</div>
<a id="ga39196d0c535fd2154c7396fcb071da7b"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga39196d0c535fd2154c7396fcb071da7b">&#9670;&nbsp;</a></span>XBRAM_CE_FFD_15_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_CE_FFD_15_OFFSET&#160;&#160;&#160;0x13C</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Correctable error first failing data Register, 511-480. </p>

</div>
</div>
<a id="ga9b40093406a921feff2f6419c4e9c592"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga9b40093406a921feff2f6419c4e9c592">&#9670;&nbsp;</a></span>XBRAM_CE_FFD_16_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_CE_FFD_16_OFFSET&#160;&#160;&#160;0x140</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Correctable error first failing data Register, 543-512. </p>

</div>
</div>
<a id="ga5b1f1bb5835a7331a9ed62d1cb011c6b"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga5b1f1bb5835a7331a9ed62d1cb011c6b">&#9670;&nbsp;</a></span>XBRAM_CE_FFD_17_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_CE_FFD_17_OFFSET&#160;&#160;&#160;0x144</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Correctable error first failing data Register, 575-544. </p>

</div>
</div>
<a id="gad307a7a392ee15347020e84dc06145f2"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gad307a7a392ee15347020e84dc06145f2">&#9670;&nbsp;</a></span>XBRAM_CE_FFD_18_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_CE_FFD_18_OFFSET&#160;&#160;&#160;0x148</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Correctable error first failing data Register, 607-576. </p>

</div>
</div>
<a id="gaa066298a3df7ae0cd1cded665037553b"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gaa066298a3df7ae0cd1cded665037553b">&#9670;&nbsp;</a></span>XBRAM_CE_FFD_19_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_CE_FFD_19_OFFSET&#160;&#160;&#160;0x14C</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Correctable error first failing data Register, 639-608. </p>

</div>
</div>
<a id="ga53c453716e72763bd19786d217fc3bbc"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga53c453716e72763bd19786d217fc3bbc">&#9670;&nbsp;</a></span>XBRAM_CE_FFD_1_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_CE_FFD_1_OFFSET&#160;&#160;&#160;0x104</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Correctable error first failing data Register, 63-32. </p>

</div>
</div>
<a id="ga80b471a580edfdda8a91842ff6d1832b"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga80b471a580edfdda8a91842ff6d1832b">&#9670;&nbsp;</a></span>XBRAM_CE_FFD_20_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_CE_FFD_20_OFFSET&#160;&#160;&#160;0x150</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Correctable error first failing data Register, 671-640. </p>

</div>
</div>
<a id="ga4d2212a596f185087b0a6fcc259aad8d"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga4d2212a596f185087b0a6fcc259aad8d">&#9670;&nbsp;</a></span>XBRAM_CE_FFD_21_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_CE_FFD_21_OFFSET&#160;&#160;&#160;0x154</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Correctable error first failing data Register, 703-672. </p>

</div>
</div>
<a id="ga22b9375c4c6979bf4b9ff0f46da20144"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga22b9375c4c6979bf4b9ff0f46da20144">&#9670;&nbsp;</a></span>XBRAM_CE_FFD_22_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_CE_FFD_22_OFFSET&#160;&#160;&#160;0x158</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Correctable error first failing data Register, 735-704. </p>

</div>
</div>
<a id="ga362cc644b2d14ce18e880ac7357409c5"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga362cc644b2d14ce18e880ac7357409c5">&#9670;&nbsp;</a></span>XBRAM_CE_FFD_23_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_CE_FFD_23_OFFSET&#160;&#160;&#160;0x15C</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Correctable error first failing data Register, 767-736. </p>

</div>
</div>
<a id="gaeddcfb5854b88e4335db26dba0a6acd6"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gaeddcfb5854b88e4335db26dba0a6acd6">&#9670;&nbsp;</a></span>XBRAM_CE_FFD_24_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_CE_FFD_24_OFFSET&#160;&#160;&#160;0x160</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Correctable error first failing data Register, 799-768. </p>

</div>
</div>
<a id="ga432d170d7c49d50b98d6cdeab18357c1"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga432d170d7c49d50b98d6cdeab18357c1">&#9670;&nbsp;</a></span>XBRAM_CE_FFD_25_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_CE_FFD_25_OFFSET&#160;&#160;&#160;0x164</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Correctable error first failing data Register, 831-800. </p>

</div>
</div>
<a id="ga9a6769c89417b38c032900b5d27db888"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga9a6769c89417b38c032900b5d27db888">&#9670;&nbsp;</a></span>XBRAM_CE_FFD_26_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_CE_FFD_26_OFFSET&#160;&#160;&#160;0x168</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Correctable error first failing data Register, 863-832. </p>

</div>
</div>
<a id="gaa5f596746613deedf350c2a05fa83c41"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gaa5f596746613deedf350c2a05fa83c41">&#9670;&nbsp;</a></span>XBRAM_CE_FFD_27_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_CE_FFD_27_OFFSET&#160;&#160;&#160;0x16C</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Correctable error first failing data Register, 895-864. </p>

</div>
</div>
<a id="gaa77a0f1427e291c95321811a2f0df97b"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gaa77a0f1427e291c95321811a2f0df97b">&#9670;&nbsp;</a></span>XBRAM_CE_FFD_28_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_CE_FFD_28_OFFSET&#160;&#160;&#160;0x170</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Correctable error first failing data Register, 927-896. </p>

</div>
</div>
<a id="gab32289b47942c90cb79feb34cec01b91"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gab32289b47942c90cb79feb34cec01b91">&#9670;&nbsp;</a></span>XBRAM_CE_FFD_29_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_CE_FFD_29_OFFSET&#160;&#160;&#160;0x174</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Correctable error first failing data Register, 959-928. </p>

</div>
</div>
<a id="ga2a535c1b67c8a9a5269177d101e2c756"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga2a535c1b67c8a9a5269177d101e2c756">&#9670;&nbsp;</a></span>XBRAM_CE_FFD_2_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_CE_FFD_2_OFFSET&#160;&#160;&#160;0x108</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Correctable error first failing data Register, 95-64. </p>

</div>
</div>
<a id="ga0ddc18fca994ef2701ff7c5a85946f1a"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga0ddc18fca994ef2701ff7c5a85946f1a">&#9670;&nbsp;</a></span>XBRAM_CE_FFD_30_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_CE_FFD_30_OFFSET&#160;&#160;&#160;0x178</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Correctable error first failing data Register, 991-960. </p>

</div>
</div>
<a id="gaac5b99e4d9e561ad68f834abc34e8374"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gaac5b99e4d9e561ad68f834abc34e8374">&#9670;&nbsp;</a></span>XBRAM_CE_FFD_31_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_CE_FFD_31_OFFSET&#160;&#160;&#160;0x17C</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Correctable error first failing data Register, 1023-992. </p>

</div>
</div>
<a id="gaaca415ca0a5618f930cf32fd013297fc"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gaaca415ca0a5618f930cf32fd013297fc">&#9670;&nbsp;</a></span>XBRAM_CE_FFD_3_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_CE_FFD_3_OFFSET&#160;&#160;&#160;0x10C</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Correctable error first failing data Register, 127-96. </p>

</div>
</div>
<a id="ga2869a0061c7ff0ade8b507135f404b02"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga2869a0061c7ff0ade8b507135f404b02">&#9670;&nbsp;</a></span>XBRAM_CE_FFD_4_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_CE_FFD_4_OFFSET&#160;&#160;&#160;0x110</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Correctable error first failing data Register, 159-128. </p>

</div>
</div>
<a id="ga70ced7f84d7536867d282a9661229d58"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga70ced7f84d7536867d282a9661229d58">&#9670;&nbsp;</a></span>XBRAM_CE_FFD_5_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_CE_FFD_5_OFFSET&#160;&#160;&#160;0x114</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Correctable error first failing data Register, 191-160. </p>

</div>
</div>
<a id="ga8d2bc01b2692925c5843a33e1e78ab3c"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga8d2bc01b2692925c5843a33e1e78ab3c">&#9670;&nbsp;</a></span>XBRAM_CE_FFD_6_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_CE_FFD_6_OFFSET&#160;&#160;&#160;0x118</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Correctable error first failing data Register, 223-192. </p>

</div>
</div>
<a id="ga8af82dcc00374f78cb3bc37f10647cae"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga8af82dcc00374f78cb3bc37f10647cae">&#9670;&nbsp;</a></span>XBRAM_CE_FFD_7_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_CE_FFD_7_OFFSET&#160;&#160;&#160;0x11C</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Correctable error first failing data Register, 255-224. </p>

</div>
</div>
<a id="ga20bd5998265b96d7c360adc99254b4bb"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga20bd5998265b96d7c360adc99254b4bb">&#9670;&nbsp;</a></span>XBRAM_CE_FFD_8_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_CE_FFD_8_OFFSET&#160;&#160;&#160;0x120</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Correctable error first failing data Register, 287-256. </p>

</div>
</div>
<a id="gaf989dfcfdb9eab43c4b129f9eba174a5"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gaf989dfcfdb9eab43c4b129f9eba174a5">&#9670;&nbsp;</a></span>XBRAM_CE_FFD_9_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_CE_FFD_9_OFFSET&#160;&#160;&#160;0x124</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Correctable error first failing data Register, 319-288. </p>

</div>
</div>
<a id="ga80f2eea8b2d7528428940b32a65f4d62"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga80f2eea8b2d7528428940b32a65f4d62">&#9670;&nbsp;</a></span>XBRAM_CE_FFE_0_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_CE_FFE_0_OFFSET&#160;&#160;&#160;0x180</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Correctable error first failing ECC Register, 31-0. </p>

</div>
</div>
<a id="gaff1d136a2dc08caa938225b04fef25d1"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gaff1d136a2dc08caa938225b04fef25d1">&#9670;&nbsp;</a></span>XBRAM_CE_FFE_1_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_CE_FFE_1_OFFSET&#160;&#160;&#160;0x184</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Correctable error first failing ECC Register, 63-32. </p>

</div>
</div>
<a id="gaeb0dd722ff7c9322979747aaf8ffa86b"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gaeb0dd722ff7c9322979747aaf8ffa86b">&#9670;&nbsp;</a></span>XBRAM_CE_FFE_2_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_CE_FFE_2_OFFSET&#160;&#160;&#160;0x188</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Correctable error first failing ECC Register, 95-64. </p>

</div>
</div>
<a id="gadabeed9529bc2962622ed92eaef3fa47"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gadabeed9529bc2962622ed92eaef3fa47">&#9670;&nbsp;</a></span>XBRAM_CE_FFE_3_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_CE_FFE_3_OFFSET&#160;&#160;&#160;0x18C</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Correctable error first failing ECC Register, 127-96. </p>

</div>
</div>
<a id="gac53b5b051994ba0dc8a93047e326d0f4"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gac53b5b051994ba0dc8a93047e326d0f4">&#9670;&nbsp;</a></span>XBRAM_CE_FFE_4_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_CE_FFE_4_OFFSET&#160;&#160;&#160;0x190</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Correctable error first failing ECC Register, 159-128. </p>

</div>
</div>
<a id="gaed34dd3c61cfd7ee159eacccee9d2b9b"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gaed34dd3c61cfd7ee159eacccee9d2b9b">&#9670;&nbsp;</a></span>XBRAM_CE_FFE_5_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_CE_FFE_5_OFFSET&#160;&#160;&#160;0x194</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Correctable error first failing ECC Register, 191-160. </p>

</div>
</div>
<a id="gaf10601214d7b5cb9dd1ada50456c53ae"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gaf10601214d7b5cb9dd1ada50456c53ae">&#9670;&nbsp;</a></span>XBRAM_CE_FFE_6_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_CE_FFE_6_OFFSET&#160;&#160;&#160;0x198</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Correctable error first failing ECC Register, 223-192. </p>

</div>
</div>
<a id="ga75dffd37d7d0c364d58f4c887953b83f"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga75dffd37d7d0c364d58f4c887953b83f">&#9670;&nbsp;</a></span>XBRAM_CE_FFE_7_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_CE_FFE_7_OFFSET&#160;&#160;&#160;0x19C</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Correctable error first failing ECC Register, 255-224. </p>

</div>
</div>
<a id="ga1bd9b2cad381c89b81b18e4784b357d3"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga1bd9b2cad381c89b81b18e4784b357d3">&#9670;&nbsp;</a></span>XBRAM_ECC_EN_IRQ_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_ECC_EN_IRQ_OFFSET&#160;&#160;&#160;0x4</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>ECC interrupt enable Register. </p>

<p class="reference">Referenced by <a class="el" href="group__bram__v4__0.html#ga9ce680e885511fdd26b6818b71b145c4">XBram_InterruptDisable()</a>, <a class="el" href="group__bram__v4__0.html#ga4210a263bd85db259a74c20cd0b0176c">XBram_InterruptEnable()</a>, <a class="el" href="group__bram__v4__0.html#gafec7418ceae662672c03a938290da9dd">XBram_InterruptGetEnabled()</a>, and <a class="el" href="group__bram__v4__0.html#ga3880bb684ad362c6bd289f3e76a98b59">XBram_InterruptGetStatus()</a>.</p>

</div>
</div>
<a id="ga5a60015301177917f16c852b91a804a8"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga5a60015301177917f16c852b91a804a8">&#9670;&nbsp;</a></span>XBRAM_ECC_ON_OFF_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_ECC_ON_OFF_OFFSET&#160;&#160;&#160;0x8</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>ECC on/off register. </p>

</div>
</div>
<a id="gab88ad395282af43eaf6890c73e1a767d"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gab88ad395282af43eaf6890c73e1a767d">&#9670;&nbsp;</a></span>XBRAM_ECC_STATUS_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_ECC_STATUS_OFFSET&#160;&#160;&#160;0x0</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>ECC status Register. </p>

<p class="reference">Referenced by <a class="el" href="group__bram__v4__0.html#gaa4ac1ca5c9c05eabbdea77f35ba9ac5a">XBram_InterruptClear()</a>.</p>

</div>
</div>
<a id="ga4327d8d346ed2ff2258df3897efcbcac"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga4327d8d346ed2ff2258df3897efcbcac">&#9670;&nbsp;</a></span>XBRAM_FI_D_0_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_FI_D_0_OFFSET&#160;&#160;&#160;0x300</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Fault injection Data Register, 31-0. </p>

</div>
</div>
<a id="gacf3ff9e2d2cb7d4f322c500d85627490"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gacf3ff9e2d2cb7d4f322c500d85627490">&#9670;&nbsp;</a></span>XBRAM_FI_D_10_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_FI_D_10_OFFSET&#160;&#160;&#160;0x328</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Fault injection Data Register, 351-320. </p>

</div>
</div>
<a id="gac771132cbf4274f62afe142bd7ff2ea2"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gac771132cbf4274f62afe142bd7ff2ea2">&#9670;&nbsp;</a></span>XBRAM_FI_D_11_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_FI_D_11_OFFSET&#160;&#160;&#160;0x32C</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Fault injection Data Register, 383-352. </p>

</div>
</div>
<a id="gad2f25266372cc0e30e16b7d0db59225f"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gad2f25266372cc0e30e16b7d0db59225f">&#9670;&nbsp;</a></span>XBRAM_FI_D_12_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_FI_D_12_OFFSET&#160;&#160;&#160;0x330</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Fault injection Data Register, 415-384. </p>

</div>
</div>
<a id="gad0396bceb3bb788d56ccf185b85aa6a9"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gad0396bceb3bb788d56ccf185b85aa6a9">&#9670;&nbsp;</a></span>XBRAM_FI_D_13_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_FI_D_13_OFFSET&#160;&#160;&#160;0x334</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Fault injection Data Register, 447-416. </p>

</div>
</div>
<a id="gaaca82f0ca4d7173cd674b954026108fb"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gaaca82f0ca4d7173cd674b954026108fb">&#9670;&nbsp;</a></span>XBRAM_FI_D_14_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_FI_D_14_OFFSET&#160;&#160;&#160;0x338</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Fault injection Data Register, 479-448. </p>

</div>
</div>
<a id="ga213c6e8d33faa8e918b88f4132c3251c"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga213c6e8d33faa8e918b88f4132c3251c">&#9670;&nbsp;</a></span>XBRAM_FI_D_15_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_FI_D_15_OFFSET&#160;&#160;&#160;0x33C</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Fault injection Data Register, 511-480. </p>

</div>
</div>
<a id="gaf76da6dc3f5451299ed0cc1a514abd19"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gaf76da6dc3f5451299ed0cc1a514abd19">&#9670;&nbsp;</a></span>XBRAM_FI_D_16_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_FI_D_16_OFFSET&#160;&#160;&#160;0x340</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Fault injection Data Register, 543-512. </p>

</div>
</div>
<a id="ga1fcd0a4e54ef5703186d022defd87d3a"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga1fcd0a4e54ef5703186d022defd87d3a">&#9670;&nbsp;</a></span>XBRAM_FI_D_17_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_FI_D_17_OFFSET&#160;&#160;&#160;0x344</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Fault injection Data Register, 575-544. </p>

</div>
</div>
<a id="ga878d7b4a4e7182fc5552b679089828e1"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga878d7b4a4e7182fc5552b679089828e1">&#9670;&nbsp;</a></span>XBRAM_FI_D_18_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_FI_D_18_OFFSET&#160;&#160;&#160;0x348</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Fault injection Data Register, 607-576. </p>

</div>
</div>
<a id="ga205e9bf1a66308b549f2122ebb6b347d"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga205e9bf1a66308b549f2122ebb6b347d">&#9670;&nbsp;</a></span>XBRAM_FI_D_19_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_FI_D_19_OFFSET&#160;&#160;&#160;0x34C</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Fault injection Data Register, 639-608. </p>

</div>
</div>
<a id="ga167bc4cbc6b7419cc695926fced4c81f"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga167bc4cbc6b7419cc695926fced4c81f">&#9670;&nbsp;</a></span>XBRAM_FI_D_1_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_FI_D_1_OFFSET&#160;&#160;&#160;0x304</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Fault injection Data Register, 63-32. </p>

</div>
</div>
<a id="ga46cf5511cb6949ddec9ef23ddaf4bc0d"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga46cf5511cb6949ddec9ef23ddaf4bc0d">&#9670;&nbsp;</a></span>XBRAM_FI_D_20_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_FI_D_20_OFFSET&#160;&#160;&#160;0x350</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Fault injection Data Register, 671-640. </p>

</div>
</div>
<a id="gab3a504a7e6e2e2f2a79d710c7d082939"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gab3a504a7e6e2e2f2a79d710c7d082939">&#9670;&nbsp;</a></span>XBRAM_FI_D_21_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_FI_D_21_OFFSET&#160;&#160;&#160;0x354</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Fault injection Data Register, 703-672. </p>

</div>
</div>
<a id="ga0a9250291f63e7d27f7bbac3d30d66c5"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga0a9250291f63e7d27f7bbac3d30d66c5">&#9670;&nbsp;</a></span>XBRAM_FI_D_22_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_FI_D_22_OFFSET&#160;&#160;&#160;0x358</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Fault injection Data Register, 735-704. </p>

</div>
</div>
<a id="ga17bc17dd12706c541ee4b32fb4d8c5ce"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga17bc17dd12706c541ee4b32fb4d8c5ce">&#9670;&nbsp;</a></span>XBRAM_FI_D_23_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_FI_D_23_OFFSET&#160;&#160;&#160;0x35C</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Fault injection Data Register, 767-736. </p>

</div>
</div>
<a id="ga5292e1f3c0ff481c4a181520f963e5a0"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga5292e1f3c0ff481c4a181520f963e5a0">&#9670;&nbsp;</a></span>XBRAM_FI_D_24_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_FI_D_24_OFFSET&#160;&#160;&#160;0x360</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Fault injection Data Register, 799-768. </p>

</div>
</div>
<a id="gabcd8cd94272a7fa34de7c4c28b407825"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gabcd8cd94272a7fa34de7c4c28b407825">&#9670;&nbsp;</a></span>XBRAM_FI_D_25_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_FI_D_25_OFFSET&#160;&#160;&#160;0x364</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Fault injection Data Register, 831-800. </p>

</div>
</div>
<a id="ga4b1e60432d61c19d78666f716dcf7204"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga4b1e60432d61c19d78666f716dcf7204">&#9670;&nbsp;</a></span>XBRAM_FI_D_26_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_FI_D_26_OFFSET&#160;&#160;&#160;0x368</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Fault injection Data Register, 863-832. </p>

</div>
</div>
<a id="ga9ac5e4cdcdce0073e6ba27bab4bdb190"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga9ac5e4cdcdce0073e6ba27bab4bdb190">&#9670;&nbsp;</a></span>XBRAM_FI_D_27_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_FI_D_27_OFFSET&#160;&#160;&#160;0x36C</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Fault injection Data Register, 895-864. </p>

</div>
</div>
<a id="ga13b4e7320cd339df9a4dc634c5532e56"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga13b4e7320cd339df9a4dc634c5532e56">&#9670;&nbsp;</a></span>XBRAM_FI_D_28_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_FI_D_28_OFFSET&#160;&#160;&#160;0x370</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Fault injection Data Register, 927-896. </p>

</div>
</div>
<a id="ga821ce4763c0423eb0464ad3f24f69f36"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga821ce4763c0423eb0464ad3f24f69f36">&#9670;&nbsp;</a></span>XBRAM_FI_D_29_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_FI_D_29_OFFSET&#160;&#160;&#160;0x374</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Fault injection Data Register, 959-928. </p>

</div>
</div>
<a id="ga9f6cc6e12cfa98ec984c4cb3e098b788"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga9f6cc6e12cfa98ec984c4cb3e098b788">&#9670;&nbsp;</a></span>XBRAM_FI_D_2_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_FI_D_2_OFFSET&#160;&#160;&#160;0x308</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Fault injection Data Register, 95-64. </p>

</div>
</div>
<a id="ga4c50d9511de680aa9ab19173c0095a8e"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga4c50d9511de680aa9ab19173c0095a8e">&#9670;&nbsp;</a></span>XBRAM_FI_D_30_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_FI_D_30_OFFSET&#160;&#160;&#160;0x378</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Fault injection Data Register, 991-960. </p>

</div>
</div>
<a id="ga6a322042e5de4e040a05afac619234e3"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga6a322042e5de4e040a05afac619234e3">&#9670;&nbsp;</a></span>XBRAM_FI_D_31_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_FI_D_31_OFFSET&#160;&#160;&#160;0x37C</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Fault injection Data Register, 1023-992. </p>

</div>
</div>
<a id="ga3029a3c7c79f9f140ba14c96b38831a8"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga3029a3c7c79f9f140ba14c96b38831a8">&#9670;&nbsp;</a></span>XBRAM_FI_D_3_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_FI_D_3_OFFSET&#160;&#160;&#160;0x30C</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Fault injection Data Register, 127-96. </p>

</div>
</div>
<a id="gadc1261408bc53307c6115765559c20aa"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gadc1261408bc53307c6115765559c20aa">&#9670;&nbsp;</a></span>XBRAM_FI_D_4_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_FI_D_4_OFFSET&#160;&#160;&#160;0x310</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Fault injection Data Register, 159-128. </p>

</div>
</div>
<a id="gadf7ec54c98166a66aaf97e6e3c6bb471"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gadf7ec54c98166a66aaf97e6e3c6bb471">&#9670;&nbsp;</a></span>XBRAM_FI_D_5_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_FI_D_5_OFFSET&#160;&#160;&#160;0x314</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Fault injection Data Register, 191-160. </p>

</div>
</div>
<a id="ga50539ee3694da7ffec33e702bae35b6c"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga50539ee3694da7ffec33e702bae35b6c">&#9670;&nbsp;</a></span>XBRAM_FI_D_6_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_FI_D_6_OFFSET&#160;&#160;&#160;0x318</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Fault injection Data Register, 223-192. </p>

</div>
</div>
<a id="ga6ba64bfd64c2ecb72658ad84dd8682c4"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga6ba64bfd64c2ecb72658ad84dd8682c4">&#9670;&nbsp;</a></span>XBRAM_FI_D_7_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_FI_D_7_OFFSET&#160;&#160;&#160;0x31C</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Fault injection Data Register, 255-224. </p>

</div>
</div>
<a id="ga34276fc1ad44947d1545b3a60a42613c"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga34276fc1ad44947d1545b3a60a42613c">&#9670;&nbsp;</a></span>XBRAM_FI_D_8_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_FI_D_8_OFFSET&#160;&#160;&#160;0x320</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Fault injection Data Register, 287-256. </p>

</div>
</div>
<a id="gab3431301bd1dcbb1f1ef04509a278140"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gab3431301bd1dcbb1f1ef04509a278140">&#9670;&nbsp;</a></span>XBRAM_FI_D_9_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_FI_D_9_OFFSET&#160;&#160;&#160;0x324</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Fault injection Data Register, 319-288. </p>

</div>
</div>
<a id="ga50aa03f49e4a6d7cfe7f463f8f7f07e1"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga50aa03f49e4a6d7cfe7f463f8f7f07e1">&#9670;&nbsp;</a></span>XBRAM_FI_ECC_0_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_FI_ECC_0_OFFSET&#160;&#160;&#160;0x380</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Fault injection ECC Register, 31-0. </p>

</div>
</div>
<a id="ga4ca449a3a5d6dc1367a8a1846c8412dc"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga4ca449a3a5d6dc1367a8a1846c8412dc">&#9670;&nbsp;</a></span>XBRAM_FI_ECC_1_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_FI_ECC_1_OFFSET&#160;&#160;&#160;0x384</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Fault injection ECC Register, 63-32. </p>

</div>
</div>
<a id="gab1a7c145c2051e173bd7a552079dde3c"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gab1a7c145c2051e173bd7a552079dde3c">&#9670;&nbsp;</a></span>XBRAM_FI_ECC_2_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_FI_ECC_2_OFFSET&#160;&#160;&#160;0x388</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Fault injection ECC Register, 95-64. </p>

</div>
</div>
<a id="ga242c5934b9a6d44f728d9f3e79273de7"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga242c5934b9a6d44f728d9f3e79273de7">&#9670;&nbsp;</a></span>XBRAM_FI_ECC_3_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_FI_ECC_3_OFFSET&#160;&#160;&#160;0x38C</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Fault injection ECC Register, 127-96. </p>

</div>
</div>
<a id="ga37e4b9036be2eb508976c48ddab45f81"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga37e4b9036be2eb508976c48ddab45f81">&#9670;&nbsp;</a></span>XBRAM_FI_ECC_4_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_FI_ECC_4_OFFSET&#160;&#160;&#160;0x390</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Fault injection ECC Register, 159-128. </p>

</div>
</div>
<a id="gab00c62906a72e957204b8b53fb45518f"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gab00c62906a72e957204b8b53fb45518f">&#9670;&nbsp;</a></span>XBRAM_FI_ECC_5_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_FI_ECC_5_OFFSET&#160;&#160;&#160;0x394</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Fault injection ECC Register, 191-160. </p>

</div>
</div>
<a id="ga847d106f744e61162ef6788733623cb0"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga847d106f744e61162ef6788733623cb0">&#9670;&nbsp;</a></span>XBRAM_FI_ECC_6_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_FI_ECC_6_OFFSET&#160;&#160;&#160;0x398</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Fault injection ECC Register, 223-192. </p>

</div>
</div>
<a id="gacbb201dcba8ad81f0b95680074718824"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gacbb201dcba8ad81f0b95680074718824">&#9670;&nbsp;</a></span>XBRAM_FI_ECC_7_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_FI_ECC_7_OFFSET&#160;&#160;&#160;0x39C</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Fault injection ECC Register, 255-224. </p>

</div>
</div>
<a id="ga8b01c0b7cae31073a32887283a730adf"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga8b01c0b7cae31073a32887283a730adf">&#9670;&nbsp;</a></span>XBRAM_IR_ALL_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_IR_ALL_MASK&#160;&#160;&#160;0x3</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Mask of all bits. </p>

</div>
</div>
<a id="ga20bf7d2989ac1a6106bee563c75c236e"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga20bf7d2989ac1a6106bee563c75c236e">&#9670;&nbsp;</a></span>XBRAM_IR_CE_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_IR_CE_MASK&#160;&#160;&#160;0x2</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Mask for the correctable error. </p>

</div>
</div>
<a id="ga2802e1adab23086a18d40feaa21647ab"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga2802e1adab23086a18d40feaa21647ab">&#9670;&nbsp;</a></span>XBRAM_IR_UE_MASK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_IR_UE_MASK&#160;&#160;&#160;0x1</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Mask for the uncorrectable error. </p>

</div>
</div>
<a id="gaa1021011d8c25fa885737c6ca9695742"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gaa1021011d8c25fa885737c6ca9695742">&#9670;&nbsp;</a></span>XBram_ReadReg</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBram_ReadReg</td>
          <td>(</td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">BaseAddress, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">RegOffset&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td>&#160;&#160;&#160;XBram_In32((BaseAddress) + (RegOffset))</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Read a value from a BRAM register. </p>
<p>A 32 bit read is performed.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">BaseAddress</td><td>is the base address of the BRAM device registers. </td></tr>
    <tr><td class="paramname">RegOffset</td><td>is the register offset from the base to read from.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>Data read from the register.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>C-style signature: u32 <a class="el" href="group__bram__v4__0.html#gaa1021011d8c25fa885737c6ca9695742" title="Read a value from a BRAM register. ">XBram_ReadReg(u32 BaseAddress, u32 RegOffset)</a> </dd></dl>

<p class="reference">Referenced by <a class="el" href="group__bram__v4__0.html#gaa4ac1ca5c9c05eabbdea77f35ba9ac5a">XBram_InterruptClear()</a>, <a class="el" href="group__bram__v4__0.html#ga9ce680e885511fdd26b6818b71b145c4">XBram_InterruptDisable()</a>, <a class="el" href="group__bram__v4__0.html#ga4210a263bd85db259a74c20cd0b0176c">XBram_InterruptEnable()</a>, <a class="el" href="group__bram__v4__0.html#gafec7418ceae662672c03a938290da9dd">XBram_InterruptGetEnabled()</a>, and <a class="el" href="group__bram__v4__0.html#ga3880bb684ad362c6bd289f3e76a98b59">XBram_InterruptGetStatus()</a>.</p>

</div>
</div>
<a id="ga2668f65a7a32f076244671b399e7e22a"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga2668f65a7a32f076244671b399e7e22a">&#9670;&nbsp;</a></span>XBRAM_UE_FFA_0_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_UE_FFA_0_OFFSET&#160;&#160;&#160;0x2C0</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Uncorrectable error first failing address Register 31-0. </p>

</div>
</div>
<a id="gace4bc70050f62d21da25858032b4dc09"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gace4bc70050f62d21da25858032b4dc09">&#9670;&nbsp;</a></span>XBRAM_UE_FFA_1_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_UE_FFA_1_OFFSET&#160;&#160;&#160;0x2C4</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Uncorrectable error first failing address Register 63-32. </p>

</div>
</div>
<a id="gae3cd6bccc199556243b6e055c9e3bcb6"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gae3cd6bccc199556243b6e055c9e3bcb6">&#9670;&nbsp;</a></span>XBRAM_UE_FFD_0_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_UE_FFD_0_OFFSET&#160;&#160;&#160;0x200</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Uncorrectable error first failing data Register, 31-0. </p>

</div>
</div>
<a id="ga51a163c0ff81cd783f6ca5cee38578c6"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga51a163c0ff81cd783f6ca5cee38578c6">&#9670;&nbsp;</a></span>XBRAM_UE_FFD_10_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_UE_FFD_10_OFFSET&#160;&#160;&#160;0x228</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Uncorrectable error first failing data Register, 351-320. </p>

</div>
</div>
<a id="ga5fa6a1deabc09186bad48d3ce8de751d"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga5fa6a1deabc09186bad48d3ce8de751d">&#9670;&nbsp;</a></span>XBRAM_UE_FFD_11_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_UE_FFD_11_OFFSET&#160;&#160;&#160;0x22C</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Uncorrectable error first failing data Register, 383-352. </p>

</div>
</div>
<a id="ga340cc5cf5e2021cdb80f1b3dc8096b1a"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga340cc5cf5e2021cdb80f1b3dc8096b1a">&#9670;&nbsp;</a></span>XBRAM_UE_FFD_12_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_UE_FFD_12_OFFSET&#160;&#160;&#160;0x230</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Uncorrectable error first failing data Register, 415-384. </p>

</div>
</div>
<a id="ga287a2aa0e47e06e0b3573e737645e87d"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga287a2aa0e47e06e0b3573e737645e87d">&#9670;&nbsp;</a></span>XBRAM_UE_FFD_13_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_UE_FFD_13_OFFSET&#160;&#160;&#160;0x234</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Uncorrectable error first failing data Register, 447-416. </p>

</div>
</div>
<a id="ga5fab9920aa039d8c0f11d3c24dd2522c"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga5fab9920aa039d8c0f11d3c24dd2522c">&#9670;&nbsp;</a></span>XBRAM_UE_FFD_14_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_UE_FFD_14_OFFSET&#160;&#160;&#160;0x238</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Uncorrectable error first failing data Register, 479-448. </p>

</div>
</div>
<a id="ga3954b06a008318176f626efd83879d9b"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga3954b06a008318176f626efd83879d9b">&#9670;&nbsp;</a></span>XBRAM_UE_FFD_15_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_UE_FFD_15_OFFSET&#160;&#160;&#160;0x23C</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Uncorrectable error first failing data Register, 511-480. </p>

</div>
</div>
<a id="ga3913509be0f7ba4a818d07da1a832737"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga3913509be0f7ba4a818d07da1a832737">&#9670;&nbsp;</a></span>XBRAM_UE_FFD_16_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_UE_FFD_16_OFFSET&#160;&#160;&#160;0x240</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Uncorrectable error first failing data Register, 543-512. </p>

</div>
</div>
<a id="ga8ac75eeb2a34e03a7a8520a8d639ed6d"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga8ac75eeb2a34e03a7a8520a8d639ed6d">&#9670;&nbsp;</a></span>XBRAM_UE_FFD_17_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_UE_FFD_17_OFFSET&#160;&#160;&#160;0x244</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Uncorrectable error first failing data Register, 575-544. </p>

</div>
</div>
<a id="ga4c9813cc90627cd51a47773cbf95f52a"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga4c9813cc90627cd51a47773cbf95f52a">&#9670;&nbsp;</a></span>XBRAM_UE_FFD_18_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_UE_FFD_18_OFFSET&#160;&#160;&#160;0x248</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Uncorrectable error first failing data Register, 607-576. </p>

</div>
</div>
<a id="gae3aabef99425370d418dafe230790e88"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gae3aabef99425370d418dafe230790e88">&#9670;&nbsp;</a></span>XBRAM_UE_FFD_19_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_UE_FFD_19_OFFSET&#160;&#160;&#160;0x24C</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Uncorrectable error first failing data Register, 639-608. </p>

</div>
</div>
<a id="ga020822cb899b212488baa0b907a1e0ff"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga020822cb899b212488baa0b907a1e0ff">&#9670;&nbsp;</a></span>XBRAM_UE_FFD_1_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_UE_FFD_1_OFFSET&#160;&#160;&#160;0x204</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Uncorrectable error first failing data Register, 63-32. </p>

</div>
</div>
<a id="ga15ee9d19cf14b6fa4c85993906bba831"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga15ee9d19cf14b6fa4c85993906bba831">&#9670;&nbsp;</a></span>XBRAM_UE_FFD_20_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_UE_FFD_20_OFFSET&#160;&#160;&#160;0x250</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Uncorrectable error first failing data Register, 671-640. </p>

</div>
</div>
<a id="ga1dcdc21c8880d9aa3817070d834141ee"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga1dcdc21c8880d9aa3817070d834141ee">&#9670;&nbsp;</a></span>XBRAM_UE_FFD_21_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_UE_FFD_21_OFFSET&#160;&#160;&#160;0x254</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Uncorrectable error first failing data Register, 703-672. </p>

</div>
</div>
<a id="gaa44103fb2588cb618503fa85f6ee2cdd"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gaa44103fb2588cb618503fa85f6ee2cdd">&#9670;&nbsp;</a></span>XBRAM_UE_FFD_22_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_UE_FFD_22_OFFSET&#160;&#160;&#160;0x258</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Uncorrectable error first failing data Register, 735-704. </p>

</div>
</div>
<a id="gaf554747914f2c008c3f3bc88ae959f88"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gaf554747914f2c008c3f3bc88ae959f88">&#9670;&nbsp;</a></span>XBRAM_UE_FFD_23_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_UE_FFD_23_OFFSET&#160;&#160;&#160;0x25C</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Uncorrectable error first failing data Register, 767-736. </p>

</div>
</div>
<a id="ga88054e126d45f0c5365d00dacf730851"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga88054e126d45f0c5365d00dacf730851">&#9670;&nbsp;</a></span>XBRAM_UE_FFD_24_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_UE_FFD_24_OFFSET&#160;&#160;&#160;0x260</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Uncorrectable error first failing data Register, 799-768. </p>

</div>
</div>
<a id="ga682f4fa42e60f80eaad9699e6602f100"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga682f4fa42e60f80eaad9699e6602f100">&#9670;&nbsp;</a></span>XBRAM_UE_FFD_25_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_UE_FFD_25_OFFSET&#160;&#160;&#160;0x264</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Uncorrectable error first failing data Register, 831-800. </p>

</div>
</div>
<a id="gaeb56686ebf310e2de8d393eb9b3b5d2b"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gaeb56686ebf310e2de8d393eb9b3b5d2b">&#9670;&nbsp;</a></span>XBRAM_UE_FFD_26_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_UE_FFD_26_OFFSET&#160;&#160;&#160;0x268</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Uncorrectable error first failing data Register, 863-832. </p>

</div>
</div>
<a id="ga1c2383b058df1f51f2d17a8490c297f6"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga1c2383b058df1f51f2d17a8490c297f6">&#9670;&nbsp;</a></span>XBRAM_UE_FFD_27_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_UE_FFD_27_OFFSET&#160;&#160;&#160;0x26C</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Uncorrectable error first failing data Register, 895-864. </p>

</div>
</div>
<a id="ga06d2e06dfc0a89e37ae11798af6dc289"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga06d2e06dfc0a89e37ae11798af6dc289">&#9670;&nbsp;</a></span>XBRAM_UE_FFD_28_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_UE_FFD_28_OFFSET&#160;&#160;&#160;0x270</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Uncorrectable error first failing data Register, 927-896. </p>

</div>
</div>
<a id="ga62f24e3b288b752071ebbaffb61b436c"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga62f24e3b288b752071ebbaffb61b436c">&#9670;&nbsp;</a></span>XBRAM_UE_FFD_29_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_UE_FFD_29_OFFSET&#160;&#160;&#160;0x274</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Uncorrectable error first failing data Register, 959-928. </p>

</div>
</div>
<a id="gadc99002d47b36d4cdc6f3d497c836367"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gadc99002d47b36d4cdc6f3d497c836367">&#9670;&nbsp;</a></span>XBRAM_UE_FFD_2_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_UE_FFD_2_OFFSET&#160;&#160;&#160;0x208</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Uncorrectable error first failing data Register, 95-64. </p>

</div>
</div>
<a id="gac6b0c902d6e9f2f2ff1fc50fc103882f"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gac6b0c902d6e9f2f2ff1fc50fc103882f">&#9670;&nbsp;</a></span>XBRAM_UE_FFD_30_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_UE_FFD_30_OFFSET&#160;&#160;&#160;0x278</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Uncorrectable error first failing data Register, 991-960. </p>

</div>
</div>
<a id="ga93a70726c0f7980c86431bf3679280e2"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga93a70726c0f7980c86431bf3679280e2">&#9670;&nbsp;</a></span>XBRAM_UE_FFD_31_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_UE_FFD_31_OFFSET&#160;&#160;&#160;0x27C</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Uncorrectable error first failing data Register, 1023-992. </p>

</div>
</div>
<a id="gaf277f72cc70d8588d491a07c89667c37"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gaf277f72cc70d8588d491a07c89667c37">&#9670;&nbsp;</a></span>XBRAM_UE_FFD_3_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_UE_FFD_3_OFFSET&#160;&#160;&#160;0x20C</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Uncorrectable error first failing data Register, 127-96. </p>

</div>
</div>
<a id="ga19934429ae7fa3d24018f6f518863329"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga19934429ae7fa3d24018f6f518863329">&#9670;&nbsp;</a></span>XBRAM_UE_FFD_4_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_UE_FFD_4_OFFSET&#160;&#160;&#160;0x210</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Uncorrectable error first failing data Register, 159-128. </p>

</div>
</div>
<a id="gace645c7df0709c482d1c4893948ea8fc"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gace645c7df0709c482d1c4893948ea8fc">&#9670;&nbsp;</a></span>XBRAM_UE_FFD_5_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_UE_FFD_5_OFFSET&#160;&#160;&#160;0x214</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Uncorrectable error first failing data Register, 191-160. </p>

</div>
</div>
<a id="ga991c6cca9fdaa5741f900edad1eda0f9"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga991c6cca9fdaa5741f900edad1eda0f9">&#9670;&nbsp;</a></span>XBRAM_UE_FFD_6_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_UE_FFD_6_OFFSET&#160;&#160;&#160;0x218</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Uncorrectable error first failing data Register, 223-192. </p>

</div>
</div>
<a id="gad5e650ca47f6d403cc0c23c7f35926c5"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gad5e650ca47f6d403cc0c23c7f35926c5">&#9670;&nbsp;</a></span>XBRAM_UE_FFD_7_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_UE_FFD_7_OFFSET&#160;&#160;&#160;0x21C</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Uncorrectable error first failing data Register, 255-224. </p>

</div>
</div>
<a id="gacfbd53de7823e3ca1281fda81bf0eee9"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gacfbd53de7823e3ca1281fda81bf0eee9">&#9670;&nbsp;</a></span>XBRAM_UE_FFD_8_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_UE_FFD_8_OFFSET&#160;&#160;&#160;0x220</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Uncorrectable error first failing data Register, 287-256. </p>

</div>
</div>
<a id="ga064745425d89b3f03090e6eab65511e9"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga064745425d89b3f03090e6eab65511e9">&#9670;&nbsp;</a></span>XBRAM_UE_FFD_9_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_UE_FFD_9_OFFSET&#160;&#160;&#160;0x224</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Uncorrectable error first failing data Register, 319-288. </p>

</div>
</div>
<a id="gace262620dce703d728892d4091962a92"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gace262620dce703d728892d4091962a92">&#9670;&nbsp;</a></span>XBRAM_UE_FFE_0_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_UE_FFE_0_OFFSET&#160;&#160;&#160;0x280</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Uncorrectable error first failing ECC Register, 31-0. </p>

</div>
</div>
<a id="ga24653240a4fb4e604c851da56e14ad5d"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga24653240a4fb4e604c851da56e14ad5d">&#9670;&nbsp;</a></span>XBRAM_UE_FFE_1_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_UE_FFE_1_OFFSET&#160;&#160;&#160;0x284</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Uncorrectable error first failing ECC Register, 63-32. </p>

</div>
</div>
<a id="gad538dc3e048d58f1a740b820dd9435f1"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gad538dc3e048d58f1a740b820dd9435f1">&#9670;&nbsp;</a></span>XBRAM_UE_FFE_2_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_UE_FFE_2_OFFSET&#160;&#160;&#160;0x288</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Uncorrectable error first failing ECC Register, 95-64. </p>

</div>
</div>
<a id="gaaa71a742311aedc8025ad23ade124298"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gaaa71a742311aedc8025ad23ade124298">&#9670;&nbsp;</a></span>XBRAM_UE_FFE_3_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_UE_FFE_3_OFFSET&#160;&#160;&#160;0x28C</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Uncorrectable error first failing ECC Register, 127-96. </p>

</div>
</div>
<a id="ga5d745fd5f8a6af5f88e929be6a976d27"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga5d745fd5f8a6af5f88e929be6a976d27">&#9670;&nbsp;</a></span>XBRAM_UE_FFE_4_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_UE_FFE_4_OFFSET&#160;&#160;&#160;0x290</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Uncorrectable error first failing ECC Register, 159-128. </p>

</div>
</div>
<a id="ga2036da79fe3041d68a87eeacb9752d21"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga2036da79fe3041d68a87eeacb9752d21">&#9670;&nbsp;</a></span>XBRAM_UE_FFE_5_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_UE_FFE_5_OFFSET&#160;&#160;&#160;0x294</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Uncorrectable error first failing ECC Register, 191-160. </p>

</div>
</div>
<a id="gacda7d9738f05d3e7d3287e7fa27ac2a3"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gacda7d9738f05d3e7d3287e7fa27ac2a3">&#9670;&nbsp;</a></span>XBRAM_UE_FFE_6_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_UE_FFE_6_OFFSET&#160;&#160;&#160;0x298</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Uncorrectable error first failing ECC Register, 223-192. </p>

</div>
</div>
<a id="gaeff9efbeedd055f223f53b215653d367"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gaeff9efbeedd055f223f53b215653d367">&#9670;&nbsp;</a></span>XBRAM_UE_FFE_7_OFFSET</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBRAM_UE_FFE_7_OFFSET&#160;&#160;&#160;0x29C</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Uncorrectable error first failing ECC Register, 255-224. </p>

</div>
</div>
<a id="ga65c3e2f96ab713a71079e4597c3d4b3b"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga65c3e2f96ab713a71079e4597c3d4b3b">&#9670;&nbsp;</a></span>XBram_WriteReg</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XBram_WriteReg</td>
          <td>(</td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">BaseAddress, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">RegOffset, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">Data&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td>&#160;&#160;&#160;XBram_Out32((BaseAddress) + (RegOffset), (u32)(Data))</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>&gt;</code></p>

<p>Write a value to a BRAM register. </p>
<p>A 32 bit write is performed.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">BaseAddress</td><td>is the base address of the BRAM device register. </td></tr>
    <tr><td class="paramname">RegOffset</td><td>is the register offset from the base to write to. </td></tr>
    <tr><td class="paramname">Data</td><td>is the data written to the register.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>C-style signature: void <a class="el" href="group__bram__v4__0.html#ga65c3e2f96ab713a71079e4597c3d4b3b" title="Write a value to a BRAM register. ">XBram_WriteReg(u32 BaseAddress, u32 RegOffset, u32 Data)</a> </dd></dl>

<p class="reference">Referenced by <a class="el" href="group__bram__v4__0.html#gaa4ac1ca5c9c05eabbdea77f35ba9ac5a">XBram_InterruptClear()</a>, <a class="el" href="group__bram__v4__0.html#ga9ce680e885511fdd26b6818b71b145c4">XBram_InterruptDisable()</a>, and <a class="el" href="group__bram__v4__0.html#ga4210a263bd85db259a74c20cd0b0176c">XBram_InterruptEnable()</a>.</p>

</div>
</div>
<h2 class="groupheader">Function Documentation</h2>
<a id="gab305438b0844ddb20139878c21ef0e6b"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gab305438b0844ddb20139878c21ef0e6b">&#9670;&nbsp;</a></span>XBram_CfgInitialize()</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">int XBram_CfgInitialize </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_bram.html">XBram</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="struct_x_bram___config.html">XBram_Config</a> *&#160;</td>
          <td class="paramname"><em>Config</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">UINTPTR&#160;</td>
          <td class="paramname"><em>EffectiveAddr</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram_8c.html">xbram.c</a>&gt;</code></p>

<p>Initialize the <a class="el" href="struct_x_bram.html" title="The XBram driver instance data. ">XBram</a> instance provided by the caller based on the given configuration data. </p>
<p>Nothing is done except to initialize the InstancePtr.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to an <a class="el" href="struct_x_bram.html" title="The XBram driver instance data. ">XBram</a> instance. The memory the pointer references must be pre-allocated by the caller. Further calls to manipulate the driver through the <a class="el" href="struct_x_bram.html" title="The XBram driver instance data. ">XBram</a> API must be made with this pointer. </td></tr>
    <tr><td class="paramname">Config</td><td>is a reference to a structure containing information about a specific BRAM device. This function initializes an InstancePtr object for a specific device specified by the contents of Config. This function can initialize multiple instance objects with the use of multiple calls giving different Config information on each call. </td></tr>
    <tr><td class="paramname">EffectiveAddr</td><td>is the device base address in the virtual memory address space. The caller is responsible for keeping the address mapping from EffectiveAddr to the device physical base address unchanged once this function is invoked. Unexpected errors may occur if the address mapping changes after this function is called. If address translation is not used, use Config-&gt;BaseAddress for this parameters, passing the physical address instead.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS Initialization was successful.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p class="reference">References <a class="el" href="struct_x_bram___config.html#a58fc68e35caa4b6e99d6203feadf3867">XBram_Config::CorrectableCounterBits</a>, <a class="el" href="struct_x_bram___config.html#a523f6c9b0013be3fc8cc5ab879e39035">XBram_Config::CorrectableFailingDataRegs</a>, <a class="el" href="struct_x_bram___config.html#a68ac643548b48f788d6c2f573cb5547a">XBram_Config::CorrectableFailingRegisters</a>, <a class="el" href="struct_x_bram___config.html#ae96ce11672cf82713b994dc80a1a05aa">XBram_Config::CtrlBaseAddress</a>, <a class="el" href="struct_x_bram___config.html#ad6d36760e863506573b858fd6cfb3382">XBram_Config::DataWidth</a>, <a class="el" href="struct_x_bram___config.html#a75f61a0ada77e92ed76040a4556fc6d4">XBram_Config::EccPresent</a>, <a class="el" href="struct_x_bram___config.html#ac12c18f690cc9dbc18392ee8c01c29d7">XBram_Config::EccStatusInterruptPresent</a>, <a class="el" href="struct_x_bram___config.html#a58c670c0f23257fa4521b4fc219773bc">XBram_Config::FaultInjectionPresent</a>, <a class="el" href="struct_x_bram___config.html#aef90bb07681243210803842ba12a43da">XBram_Config::MemBaseAddress</a>, <a class="el" href="struct_x_bram___config.html#ae9461811eea019ba314302d12eb35c7f">XBram_Config::MemHighAddress</a>, <a class="el" href="struct_x_bram___config.html#a33d6e8224ae0b1a661e4c2dad194377c">XBram_Config::UncorrectableFailingDataRegs</a>, <a class="el" href="struct_x_bram___config.html#aaa48d2b7251ca2b7020514d29e56f97c">XBram_Config::UncorrectableFailingRegisters</a>, and <a class="el" href="struct_x_bram___config.html#ae19b307a3c7a9ed5649503385272072f">XBram_Config::WriteAccess</a>.</p>

<p class="reference">Referenced by <a class="el" href="xbram__example_8c.html#a324ee6c433c84befd0c6b7b6f5483246">BramExample()</a>, and <a class="el" href="xbram__intr__example_8c.html#a02808f594e2c936129bed18559bc0e97">BramIntrExample()</a>.</p>

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<h2 class="memtitle"><span class="permalink"><a href="#gaa4ac1ca5c9c05eabbdea77f35ba9ac5a">&#9670;&nbsp;</a></span>XBram_InterruptClear()</h2>

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          <td class="memname">void XBram_InterruptClear </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_bram.html">XBram</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>Mask</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram_8h.html">xbram.h</a>&gt;</code></p>

<p>Clear pending interrupts with the provided mask. </p>
<p>This function should be called after the software has serviced the interrupts that are pending. This function will assert if the hardware device has not been built with interrupt capabilities.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is the BRAM instance to operate on. </td></tr>
    <tr><td class="paramname">Mask</td><td>is the mask to clear pending interrupts for. Bit positions of 1 are cleared. This mask is formed by OR'ing bits from XBRAM_IR* bits which are contained in <a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p class="reference">References <a class="el" href="struct_x_bram___config.html#ae96ce11672cf82713b994dc80a1a05aa">XBram_Config::CtrlBaseAddress</a>, <a class="el" href="group__bram__v4__0.html#gab88ad395282af43eaf6890c73e1a767d">XBRAM_ECC_STATUS_OFFSET</a>, <a class="el" href="group__bram__v4__0.html#gaa1021011d8c25fa885737c6ca9695742">XBram_ReadReg</a>, and <a class="el" href="group__bram__v4__0.html#ga65c3e2f96ab713a71079e4597c3d4b3b">XBram_WriteReg</a>.</p>

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<h2 class="memtitle"><span class="permalink"><a href="#ga9ce680e885511fdd26b6818b71b145c4">&#9670;&nbsp;</a></span>XBram_InterruptDisable()</h2>

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          <td class="memname">void XBram_InterruptDisable </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_bram.html">XBram</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>Mask</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram_8h.html">xbram.h</a>&gt;</code></p>

<p>Disable interrupts. </p>
<p>This function allows each specific interrupt to be disabled. This function will assert if the hardware device has not been built with interrupt capabilities.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is the BRAM instance to operate on. </td></tr>
    <tr><td class="paramname">Mask</td><td>is the mask to disable. Bits set to 1 are disabled. This mask is formed by OR'ing bits from XBRAM_IR* bits which are contained in <a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p class="reference">References <a class="el" href="struct_x_bram___config.html#ae96ce11672cf82713b994dc80a1a05aa">XBram_Config::CtrlBaseAddress</a>, <a class="el" href="group__bram__v4__0.html#ga1bd9b2cad381c89b81b18e4784b357d3">XBRAM_ECC_EN_IRQ_OFFSET</a>, <a class="el" href="group__bram__v4__0.html#gaa1021011d8c25fa885737c6ca9695742">XBram_ReadReg</a>, and <a class="el" href="group__bram__v4__0.html#ga65c3e2f96ab713a71079e4597c3d4b3b">XBram_WriteReg</a>.</p>

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<h2 class="memtitle"><span class="permalink"><a href="#ga4210a263bd85db259a74c20cd0b0176c">&#9670;&nbsp;</a></span>XBram_InterruptEnable()</h2>

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          <td class="memname">void XBram_InterruptEnable </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_bram.html">XBram</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>Mask</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram_8h.html">xbram.h</a>&gt;</code></p>

<p>Enable interrupts. </p>
<p>This function will assert if the hardware device has not been built with interrupt capabilities.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is the BRAM instance to operate on. </td></tr>
    <tr><td class="paramname">Mask</td><td>is the mask to enable. Bit positions of 1 are enabled. This mask is formed by OR'ing bits from XBRAM_IR* bits which are contained in <a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p class="reference">References <a class="el" href="struct_x_bram___config.html#ae96ce11672cf82713b994dc80a1a05aa">XBram_Config::CtrlBaseAddress</a>, <a class="el" href="group__bram__v4__0.html#ga1bd9b2cad381c89b81b18e4784b357d3">XBRAM_ECC_EN_IRQ_OFFSET</a>, <a class="el" href="group__bram__v4__0.html#gaa1021011d8c25fa885737c6ca9695742">XBram_ReadReg</a>, and <a class="el" href="group__bram__v4__0.html#ga65c3e2f96ab713a71079e4597c3d4b3b">XBram_WriteReg</a>.</p>

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<h2 class="memtitle"><span class="permalink"><a href="#gafec7418ceae662672c03a938290da9dd">&#9670;&nbsp;</a></span>XBram_InterruptGetEnabled()</h2>

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          <td class="memname">u32 XBram_InterruptGetEnabled </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_bram.html">XBram</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
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<p><code>#include &lt;<a class="el" href="xbram_8h.html">xbram.h</a>&gt;</code></p>

<p>Returns the interrupt enable mask. </p>
<p>This function will assert if the hardware device has not been built with interrupt capabilities.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is the BRAM instance to operate on.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>A mask of bits made from XBRAM_IR* bits which are contained in <a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>.</dd>
<dd>
None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p class="reference">References <a class="el" href="struct_x_bram___config.html#ae96ce11672cf82713b994dc80a1a05aa">XBram_Config::CtrlBaseAddress</a>, <a class="el" href="group__bram__v4__0.html#ga1bd9b2cad381c89b81b18e4784b357d3">XBRAM_ECC_EN_IRQ_OFFSET</a>, and <a class="el" href="group__bram__v4__0.html#gaa1021011d8c25fa885737c6ca9695742">XBram_ReadReg</a>.</p>

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<h2 class="memtitle"><span class="permalink"><a href="#ga3880bb684ad362c6bd289f3e76a98b59">&#9670;&nbsp;</a></span>XBram_InterruptGetStatus()</h2>

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          <td class="memname">u32 XBram_InterruptGetStatus </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_bram.html">XBram</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram_8h.html">xbram.h</a>&gt;</code></p>

<p>Returns the status of interrupt signals. </p>
<p>Any bit in the mask set to 1 indicates that the channel associated with the bit has asserted an interrupt condition. This function will assert if the hardware device has not been built with interrupt capabilities.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is the BRAM instance to operate on.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>A pointer to a mask of bits made from XBRAM_IR* bits which are contained in <a class="el" href="xbram__hw_8h.html">xbram_hw.h</a>.</dd></dl>
<dl class="section note"><dt>Note</dt><dd></dd></dl>
<p>The interrupt status indicates the status of the device irregardless if the interrupts from the devices have been enabled or not through <a class="el" href="group__bram__v4__0.html#ga4210a263bd85db259a74c20cd0b0176c" title="Enable interrupts. ">XBram_InterruptEnable()</a>. </p>

<p class="reference">References <a class="el" href="struct_x_bram___config.html#ae96ce11672cf82713b994dc80a1a05aa">XBram_Config::CtrlBaseAddress</a>, <a class="el" href="group__bram__v4__0.html#ga1bd9b2cad381c89b81b18e4784b357d3">XBRAM_ECC_EN_IRQ_OFFSET</a>, and <a class="el" href="group__bram__v4__0.html#gaa1021011d8c25fa885737c6ca9695742">XBram_ReadReg</a>.</p>

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<h2 class="memtitle"><span class="permalink"><a href="#gab4bacc0667e96732958979264a8a1296">&#9670;&nbsp;</a></span>XBram_LookupConfig()</h2>

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          <td class="memname"><a class="el" href="struct_x_bram___config.html">XBram_Config</a> * XBram_LookupConfig </td>
          <td>(</td>
          <td class="paramtype">u16&#160;</td>
          <td class="paramname"><em>DeviceId</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram_8h.html">xbram.h</a>&gt;</code></p>

<p>Lookup the device configuration based on the unique device ID. </p>
<p>The table ConfigTable contains the configuration info for each device in the system.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">DeviceId</td><td>is the device identifier to lookup.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>A pointer of data type <a class="el" href="struct_x_bram___config.html" title="This typedef contains configuration information for the device. ">XBram_Config</a> which points to the device configuration if DeviceID is found.<ul>
<li>NULL if DeviceID is not found.</li>
</ul>
</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p class="reference">Referenced by <a class="el" href="xbram__example_8c.html#a324ee6c433c84befd0c6b7b6f5483246">BramExample()</a>, and <a class="el" href="xbram__intr__example_8c.html#a02808f594e2c936129bed18559bc0e97">BramIntrExample()</a>.</p>

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<h2 class="memtitle"><span class="permalink"><a href="#gaedbdefb6cda5c212f03271143ccf7a98">&#9670;&nbsp;</a></span>XBram_SelfTest()</h2>

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          <td class="memname">int XBram_SelfTest </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_bram.html">XBram</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>IntMask</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram_8h.html">xbram.h</a>&gt;</code></p>

<p>Run a self-test on the driver/device. </p>
<p>Unless fault injection is implemented in hardware, this function only does a minimal test in which available registers (if any) are written and read.</p>
<p>With fault injection, all possible single-bit and double-bit errors are injected, and checked to the extent possible, given the implemented hardware.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_bram.html" title="The XBram driver instance data. ">XBram</a> instance. </td></tr>
    <tr><td class="paramname">IntMask</td><td>is the interrupt mask to use. When testing with interrupts, this should be set to allow interrupt generation, otherwise it should be 0.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS if fault injection/detection is working properly OR if ECC is Not Enabled in the HW.</li>
<li>XST_FAILURE if the injected fault is not correctly detected or the Control Base Address is Zero when ECC is enabled.</li>
</ul>
If the BRAM device is not present in the hardware a bus error could be generated. Other indicators of a bus error, such as registers in bridges or buses, may be necessary to determine if this function caused a bus error.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p class="reference">References <a class="el" href="struct_x_bram___config.html#a68ac643548b48f788d6c2f573cb5547a">XBram_Config::CorrectableFailingRegisters</a>, <a class="el" href="struct_x_bram___config.html#ae96ce11672cf82713b994dc80a1a05aa">XBram_Config::CtrlBaseAddress</a>, <a class="el" href="struct_x_bram___config.html#ad6d36760e863506573b858fd6cfb3382">XBram_Config::DataWidth</a>, and <a class="el" href="struct_x_bram___config.html#a75f61a0ada77e92ed76040a4556fc6d4">XBram_Config::EccPresent</a>.</p>

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</div>
<h2 class="groupheader">Variable Documentation</h2>
<a id="gab776609479170485eb94104fe6a94a12"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gab776609479170485eb94104fe6a94a12">&#9670;&nbsp;</a></span>XBram_ConfigTable <span class="overload">[1/2]</span></h2>

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          <td class="memname"><a class="el" href="struct_x_bram___config.html">XBram_Config</a> XBram_ConfigTable[]</td>
        </tr>
      </table>
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<p><code>#include &lt;<a class="el" href="xbram__sinit_8c.html">xbram_sinit.c</a>&gt;</code></p>

<p>This table contains configuration information for each BRAM device in the system. </p>
<p>The order must match the <a class="el" href="struct_x_bram___config.html" title="This typedef contains configuration information for the device. ">XBram_Config</a> definition. </p>

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<h2 class="memtitle"><span class="permalink"><a href="#gab776609479170485eb94104fe6a94a12">&#9670;&nbsp;</a></span>XBram_ConfigTable <span class="overload">[2/2]</span></h2>

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          <td class="memname"><a class="el" href="struct_x_bram___config.html">XBram_Config</a> XBram_ConfigTable[]</td>
        </tr>
      </table>
</div><div class="memdoc">

<p><code>#include &lt;<a class="el" href="xbram__g_8c.html">xbram_g.c</a>&gt;</code></p>
<b>Initial value:</b><div class="fragment"><div class="line">= {</div><div class="line">        {</div><div class="line">         XPAR_BRAM_0_DEVICE_ID,</div><div class="line">         XPAR_BRAM_0_ECC,</div><div class="line">         XPAR_BRAM_0_FAULT_INJECT,</div><div class="line">         XPAR_BRAM_0_CE_FAILING_REGISTERS,</div><div class="line">         XPAR_BRAM_0_CE_FAILING_DATA_REGISTERS,</div><div class="line">         XPAR_BRAM_0_UE_FAILING_REGISTERS,</div><div class="line">         XPAR_BRAM_0_UE_FAILING_DATA_REGISTERS,</div><div class="line">         XPAR_BRAM_0_ECC_STATUS_REGISTERS,</div><div class="line">         XPAR_BRAM_0_CE_COUNTER_WIDTH,</div><div class="line">         XPAR_BRAM_0_ECC_ONOFF_REGISTER,</div><div class="line">         XPAR_BRAM_0_ECC_ONOFF_RESET_VALUE,</div><div class="line">         XPAR_BRAM_0_WRITE_ACCESS,</div><div class="line">         XPAR_BRAM_0_BASEADDR,</div><div class="line">         XPAR_BRAM_0_HIGHADDR,</div><div class="line">         XPAR_BRAM_0_CTRL_BASEADDR,</div><div class="line">         XPAR_BRAM_0_CTRL_HIGHADDR,</div><div class="line">        }</div><div class="line">}</div></div><!-- fragment -->
<p>This table contains configuration information for each BRAM device in the system. </p>
<p>The order must match the <a class="el" href="struct_x_bram___config.html" title="This typedef contains configuration information for the device. ">XBram_Config</a> definition. </p>

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